1 # Copyright (c) 2015 Advanced Micro Devices, Inc.
4 # For use for simulation and test purposes only
6 # Redistribution and use in source and binary forms, with or without
7 # modification, are permitted provided that the following conditions are met:
9 # 1. Redistributions of source code must retain the above copyright notice,
10 # this list of conditions and the following disclaimer.
12 # 2. Redistributions in binary form must reproduce the above copyright notice,
13 # this list of conditions and the following disclaimer in the documentation
14 # and/or other materials provided with the distribution.
16 # 3. Neither the name of the copyright holder nor the names of its
17 # contributors may be used to endorse or promote products derived from this
18 # software without specific prior written permission.
20 # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 # AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 # IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 # ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
24 # LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 # CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 # SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 # INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 # CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 # ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 # POSSIBILITY OF SUCH DAMAGE.
32 # Authors: Sooraj Puthoor
36 from m5
.objects
import *
37 from m5
.defines
import buildEnv
38 from Ruby
import create_topology
39 from Ruby
import send_evicts
41 from topologies
.Cluster
import Cluster
42 from topologies
.Crossbar
import Crossbar
48 # Use SeqCount not class since we need global count
50 return CntrlBase
._seqs
- 1
55 # Use CntlCount not class since we need global count
56 CntrlBase
._cntrls
+= 1
57 return CntrlBase
._cntrls
- 1
61 def versionCount(cls
):
62 cls
._version
+= 1 # Use count for this particular type
63 return cls
._version
- 1
65 class L1Cache(RubyCache
):
66 resourceStalls
= False
71 def create(self
, size
, assoc
, options
):
72 self
.size
= MemorySize(size
)
74 self
.replacement_policy
= PseudoLRUReplacementPolicy()
76 class L2Cache(RubyCache
):
77 resourceStalls
= False
81 def create(self
, size
, assoc
, options
):
82 self
.size
= MemorySize(size
)
84 self
.replacement_policy
= PseudoLRUReplacementPolicy()
86 class CPCntrl(CorePair_Controller
, CntrlBase
):
88 def create(self
, options
, ruby_system
, system
):
89 self
.version
= self
.versionCount()
91 self
.L1Icache
= L1Cache()
92 self
.L1Icache
.create(options
.l1i_size
, options
.l1i_assoc
, options
)
93 self
.L1D0cache
= L1Cache()
94 self
.L1D0cache
.create(options
.l1d_size
, options
.l1d_assoc
, options
)
95 self
.L1D1cache
= L1Cache()
96 self
.L1D1cache
.create(options
.l1d_size
, options
.l1d_assoc
, options
)
97 self
.L2cache
= L2Cache()
98 self
.L2cache
.create(options
.l2_size
, options
.l2_assoc
, options
)
100 self
.sequencer
= RubySequencer()
101 self
.sequencer
.version
= self
.seqCount()
102 self
.sequencer
.icache
= self
.L1Icache
103 self
.sequencer
.dcache
= self
.L1D0cache
104 self
.sequencer
.ruby_system
= ruby_system
105 self
.sequencer
.coreid
= 0
106 self
.sequencer
.is_cpu_sequencer
= True
108 self
.sequencer1
= RubySequencer()
109 self
.sequencer1
.version
= self
.seqCount()
110 self
.sequencer1
.icache
= self
.L1Icache
111 self
.sequencer1
.dcache
= self
.L1D1cache
112 self
.sequencer1
.ruby_system
= ruby_system
113 self
.sequencer1
.coreid
= 1
114 self
.sequencer1
.is_cpu_sequencer
= True
116 self
.issue_latency
= options
.cpu_to_dir_latency
117 self
.send_evictions
= send_evicts(options
)
119 self
.ruby_system
= ruby_system
121 if options
.recycle_latency
:
122 self
.recycle_latency
= options
.recycle_latency
124 class TCPCache(RubyCache
):
129 dataAccessLatency
= 4
131 def create(self
, options
):
132 self
.size
= MemorySize(options
.tcp_size
)
133 self
.dataArrayBanks
= 16
134 self
.tagArrayBanks
= 16
135 self
.dataAccessLatency
= 4
136 self
.tagAccessLatency
= 1
137 self
.resourceStalls
= options
.no_tcc_resource_stalls
138 self
.replacement_policy
= PseudoLRUReplacementPolicy()
140 class TCPCntrl(TCP_Controller
, CntrlBase
):
142 def create(self
, options
, ruby_system
, system
):
143 self
.version
= self
.versionCount()
144 self
.L1cache
= TCPCache()
145 self
.L1cache
.create(options
)
146 self
.issue_latency
= 1
148 self
.coalescer
= VIPERCoalescer()
149 self
.coalescer
.version
= self
.seqCount()
150 self
.coalescer
.icache
= self
.L1cache
151 self
.coalescer
.dcache
= self
.L1cache
152 self
.coalescer
.ruby_system
= ruby_system
153 self
.coalescer
.support_inst_reqs
= False
154 self
.coalescer
.is_cpu_sequencer
= False
156 self
.sequencer
= RubySequencer()
157 self
.sequencer
.version
= self
.seqCount()
158 self
.sequencer
.icache
= self
.L1cache
159 self
.sequencer
.dcache
= self
.L1cache
160 self
.sequencer
.ruby_system
= ruby_system
161 self
.sequencer
.is_cpu_sequencer
= True
163 self
.use_seq_not_coal
= False
165 self
.ruby_system
= ruby_system
166 if options
.recycle_latency
:
167 self
.recycle_latency
= options
.recycle_latency
169 class SQCCache(RubyCache
):
172 dataAccessLatency
= 1
175 def create(self
, options
):
176 self
.size
= MemorySize(options
.sqc_size
)
177 self
.assoc
= options
.sqc_assoc
178 self
.replacement_policy
= PseudoLRUReplacementPolicy()
180 class SQCCntrl(SQC_Controller
, CntrlBase
):
182 def create(self
, options
, ruby_system
, system
):
183 self
.version
= self
.versionCount()
184 self
.L1cache
= SQCCache()
185 self
.L1cache
.create(options
)
186 self
.L1cache
.resourceStalls
= False
187 self
.sequencer
= RubySequencer()
188 self
.sequencer
.version
= self
.seqCount()
189 self
.sequencer
.icache
= self
.L1cache
190 self
.sequencer
.dcache
= self
.L1cache
191 self
.sequencer
.ruby_system
= ruby_system
192 self
.sequencer
.support_data_reqs
= False
193 self
.sequencer
.is_cpu_sequencer
= False
194 self
.ruby_system
= ruby_system
195 if options
.recycle_latency
:
196 self
.recycle_latency
= options
.recycle_latency
198 class TCC(RubyCache
):
199 size
= MemorySize("256kB")
201 dataAccessLatency
= 8
203 resourceStalls
= True
204 def create(self
, options
):
205 self
.assoc
= options
.tcc_assoc
206 if hasattr(options
, 'bw_scalor') and options
.bw_scalor
> 0:
207 s
= options
.num_compute_units
209 tcc_size
= str(tcc_size
)+'kB'
210 self
.size
= MemorySize(tcc_size
)
211 self
.dataArrayBanks
= 64
212 self
.tagArrayBanks
= 64
214 self
.size
= MemorySize(options
.tcc_size
)
215 self
.dataArrayBanks
= 256 / options
.num_tccs
#number of data banks
216 self
.tagArrayBanks
= 256 / options
.num_tccs
#number of tag banks
217 self
.size
.value
= self
.size
.value
/ options
.num_tccs
218 if ((self
.size
.value
/ long(self
.assoc
)) < 128):
219 self
.size
.value
= long(128 * self
.assoc
)
220 self
.start_index_bit
= math
.log(options
.cacheline_size
, 2) + \
221 math
.log(options
.num_tccs
, 2)
222 self
.replacement_policy
= PseudoLRUReplacementPolicy()
224 class TCCCntrl(TCC_Controller
, CntrlBase
):
225 def create(self
, options
, ruby_system
, system
):
226 self
.version
= self
.versionCount()
228 self
.L2cache
.create(options
)
229 self
.ruby_system
= ruby_system
230 self
.L2cache
.resourceStalls
= options
.no_tcc_resource_stalls
232 if options
.recycle_latency
:
233 self
.recycle_latency
= options
.recycle_latency
235 class L3Cache(RubyCache
):
239 def create(self
, options
, ruby_system
, system
):
240 self
.size
= MemorySize(options
.l3_size
)
241 self
.size
.value
/= options
.num_dirs
242 self
.assoc
= options
.l3_assoc
243 self
.dataArrayBanks
/= options
.num_dirs
244 self
.tagArrayBanks
/= options
.num_dirs
245 self
.dataArrayBanks
/= options
.num_dirs
246 self
.tagArrayBanks
/= options
.num_dirs
247 self
.dataAccessLatency
= options
.l3_data_latency
248 self
.tagAccessLatency
= options
.l3_tag_latency
249 self
.resourceStalls
= False
250 self
.replacement_policy
= PseudoLRUReplacementPolicy()
252 class ProbeFilter(RubyCache
):
258 def create(self
, options
, ruby_system
, system
):
259 self
.block_size
= "%dB" % (64 * options
.blocks_per_region
)
260 self
.size
= options
.region_dir_entries
* \
261 self
.block_size
* options
.num_compute_units
263 self
.tagArrayBanks
= 8
264 self
.tagAccessLatency
= options
.dir_tag_latency
265 self
.dataAccessLatency
= 1
266 self
.resourceStalls
= options
.no_resource_stalls
267 self
.start_index_bit
= 6 + int(math
.log(options
.blocks_per_region
, 2))
268 self
.replacement_policy
= PseudoLRUReplacementPolicy()
270 class L3Cntrl(L3Cache_Controller
, CntrlBase
):
271 def create(self
, options
, ruby_system
, system
):
272 self
.version
= self
.versionCount()
273 self
.L3cache
= L3Cache()
274 self
.L3cache
.create(options
, ruby_system
, system
)
275 self
.l3_response_latency
= \
276 max(self
.L3cache
.dataAccessLatency
, self
.L3cache
.tagAccessLatency
)
277 self
.ruby_system
= ruby_system
278 if options
.recycle_latency
:
279 self
.recycle_latency
= options
.recycle_latency
281 def connectWireBuffers(self
, req_to_dir
, resp_to_dir
, l3_unblock_to_dir
,
282 req_to_l3
, probe_to_l3
, resp_to_l3
):
283 self
.reqToDir
= req_to_dir
284 self
.respToDir
= resp_to_dir
285 self
.l3UnblockToDir
= l3_unblock_to_dir
286 self
.reqToL3
= req_to_l3
287 self
.probeToL3
= probe_to_l3
288 self
.respToL3
= resp_to_l3
290 class DirMem(RubyDirectoryMemory
, CntrlBase
):
291 def create(self
, options
, ruby_system
, system
):
292 self
.version
= self
.versionCount()
294 phys_mem_size
= AddrRange(options
.mem_size
).size()
295 mem_module_size
= phys_mem_size
/ options
.num_dirs
296 dir_size
= MemorySize('0B')
297 dir_size
.value
= mem_module_size
300 class DirCntrl(Directory_Controller
, CntrlBase
):
301 def create(self
, options
, ruby_system
, system
):
302 self
.version
= self
.versionCount()
303 self
.response_latency
= 30
304 self
.directory
= DirMem()
305 self
.directory
.create(options
, ruby_system
, system
)
306 self
.L3CacheMemory
= L3Cache()
307 self
.L3CacheMemory
.create(options
, ruby_system
, system
)
308 self
.ProbeFilterMemory
= ProbeFilter()
309 self
.ProbeFilterMemory
.create(options
, ruby_system
, system
)
310 self
.l3_hit_latency
= \
311 max(self
.L3CacheMemory
.dataAccessLatency
,
312 self
.L3CacheMemory
.tagAccessLatency
)
314 self
.ruby_system
= ruby_system
315 if options
.recycle_latency
:
316 self
.recycle_latency
= options
.recycle_latency
318 def connectWireBuffers(self
, req_to_dir
, resp_to_dir
, l3_unblock_to_dir
,
319 req_to_l3
, probe_to_l3
, resp_to_l3
):
320 self
.reqToDir
= req_to_dir
321 self
.respToDir
= resp_to_dir
322 self
.l3UnblockToDir
= l3_unblock_to_dir
323 self
.reqToL3
= req_to_l3
324 self
.probeToL3
= probe_to_l3
325 self
.respToL3
= resp_to_l3
327 def define_options(parser
):
328 parser
.add_option("--num-subcaches", type = "int", default
= 4)
329 parser
.add_option("--l3-data-latency", type = "int", default
= 20)
330 parser
.add_option("--l3-tag-latency", type = "int", default
= 15)
331 parser
.add_option("--cpu-to-dir-latency", type = "int", default
= 120)
332 parser
.add_option("--gpu-to-dir-latency", type = "int", default
= 120)
333 parser
.add_option("--no-resource-stalls", action
= "store_false",
335 parser
.add_option("--no-tcc-resource-stalls", action
= "store_false",
337 parser
.add_option("--num-tbes", type = "int", default
= 2560)
338 parser
.add_option("--l2-latency", type = "int", default
= 50) # load to use
339 parser
.add_option("--num-tccs", type = "int", default
= 1,
340 help = "number of TCC banks in the GPU")
341 parser
.add_option("--sqc-size", type = 'string', default
= '32kB',
342 help = "SQC cache size")
343 parser
.add_option("--sqc-assoc", type = 'int', default
= 8,
344 help = "SQC cache assoc")
345 parser
.add_option("--region-dir-entries", type = "int", default
= 8192)
346 parser
.add_option("--dir-tag-latency", type = "int", default
= 8)
347 parser
.add_option("--dir-tag-banks", type = "int", default
= 4)
348 parser
.add_option("--blocks-per-region", type = "int", default
= 1)
349 parser
.add_option("--use-L3-on-WT", action
= "store_true", default
= False)
350 parser
.add_option("--nonInclusiveDir", action
= "store_true",
352 parser
.add_option("--WB_L1", action
= "store_true",
353 default
= False, help = "writeback L2")
354 parser
.add_option("--WB_L2", action
= "store_true",
355 default
= False, help = "writeback L2")
356 parser
.add_option("--TCP_latency", type = "int",
357 default
= 4, help = "TCP latency")
358 parser
.add_option("--TCC_latency", type = "int",
359 default
= 16, help = "TCC latency")
360 parser
.add_option("--tcc-size", type = 'string', default
= '2MB',
361 help = "agregate tcc size")
362 parser
.add_option("--tcc-assoc", type = 'int', default
= 16,
364 parser
.add_option("--tcp-size", type = 'string', default
= '16kB',
366 parser
.add_option("--sampler-sets", type = "int", default
= 1024)
367 parser
.add_option("--sampler-assoc", type = "int", default
= 16)
368 parser
.add_option("--sampler-counter", type = "int", default
= 512)
369 parser
.add_option("--noL1", action
= "store_true", default
= False,
371 parser
.add_option("--noL2", action
= "store_true", default
= False,
374 def create_system(options
, full_system
, system
, dma_devices
, bootmem
,
376 if buildEnv
['PROTOCOL'] != 'GPU_VIPER_Baseline':
377 panic("This script requires the" \
378 "GPU_VIPER_Baseline protocol to be built.")
383 # The ruby network creation expects the list of nodes in the system to be
384 # consistent with the NetDest list. Therefore the l1 controller nodes
385 # must be listed before the directory nodes and directory nodes before
396 # Must create the individual controllers before the network to ensure the
397 # controller constructors are called before the network constructor
400 # For an odd number of CPUs, still create the right number of controllers
401 TCC_bits
= int(math
.log(options
.num_tccs
, 2))
403 # This is the base crossbar that connects the L3s, Dirs, and cpu/gpu
405 crossbar_bw
= 16 * options
.num_compute_units
#Assuming a 2GHz clock
406 mainCluster
= Cluster(intBW
= crossbar_bw
)
407 for i
in xrange(options
.num_dirs
):
409 dir_cntrl
= DirCntrl(noTCCdir
=True,TCC_select_num_bits
= TCC_bits
)
410 dir_cntrl
.create(options
, ruby_system
, system
)
411 dir_cntrl
.number_of_TBEs
= options
.num_tbes
412 dir_cntrl
.useL3OnWT
= options
.use_L3_on_WT
413 dir_cntrl
.inclusiveDir
= not options
.nonInclusiveDir
415 # Connect the Directory controller to the ruby network
416 dir_cntrl
.requestFromCores
= MessageBuffer(ordered
= True)
417 dir_cntrl
.requestFromCores
.slave
= ruby_system
.network
.master
419 dir_cntrl
.responseFromCores
= MessageBuffer()
420 dir_cntrl
.responseFromCores
.slave
= ruby_system
.network
.master
422 dir_cntrl
.unblockFromCores
= MessageBuffer()
423 dir_cntrl
.unblockFromCores
.slave
= ruby_system
.network
.master
425 dir_cntrl
.probeToCore
= MessageBuffer()
426 dir_cntrl
.probeToCore
.master
= ruby_system
.network
.slave
428 dir_cntrl
.responseToCore
= MessageBuffer()
429 dir_cntrl
.responseToCore
.master
= ruby_system
.network
.slave
431 dir_cntrl
.triggerQueue
= MessageBuffer(ordered
= True)
432 dir_cntrl
.L3triggerQueue
= MessageBuffer(ordered
= True)
433 dir_cntrl
.responseFromMemory
= MessageBuffer()
435 exec("system.dir_cntrl%d = dir_cntrl" % i
)
436 dir_cntrl_nodes
.append(dir_cntrl
)
437 mainCluster
.add(dir_cntrl
)
439 cpuCluster
= Cluster(extBW
= crossbar_bw
, intBW
=crossbar_bw
)
440 for i
in xrange((options
.num_cpus
+ 1) / 2):
443 cp_cntrl
.create(options
, ruby_system
, system
)
445 exec("system.cp_cntrl%d = cp_cntrl" % i
)
447 # Add controllers and sequencers to the appropriate lists
449 cpu_sequencers
.extend([cp_cntrl
.sequencer
, cp_cntrl
.sequencer1
])
451 # Connect the CP controllers and the network
452 cp_cntrl
.requestFromCore
= MessageBuffer()
453 cp_cntrl
.requestFromCore
.master
= ruby_system
.network
.slave
455 cp_cntrl
.responseFromCore
= MessageBuffer()
456 cp_cntrl
.responseFromCore
.master
= ruby_system
.network
.slave
458 cp_cntrl
.unblockFromCore
= MessageBuffer()
459 cp_cntrl
.unblockFromCore
.master
= ruby_system
.network
.slave
461 cp_cntrl
.probeToCore
= MessageBuffer()
462 cp_cntrl
.probeToCore
.slave
= ruby_system
.network
.master
464 cp_cntrl
.responseToCore
= MessageBuffer()
465 cp_cntrl
.responseToCore
.slave
= ruby_system
.network
.master
467 cp_cntrl
.mandatoryQueue
= MessageBuffer()
468 cp_cntrl
.triggerQueue
= MessageBuffer(ordered
= True)
470 cpuCluster
.add(cp_cntrl
)
472 gpuCluster
= Cluster(extBW
= crossbar_bw
, intBW
= crossbar_bw
)
473 for i
in xrange(options
.num_compute_units
):
475 tcp_cntrl
= TCPCntrl(TCC_select_num_bits
= TCC_bits
,
477 number_of_TBEs
= 2560)
478 # TBEs set to max outstanding requests
479 tcp_cntrl
.create(options
, ruby_system
, system
)
480 tcp_cntrl
.WB
= options
.WB_L1
481 tcp_cntrl
.disableL1
= options
.noL1
483 exec("system.tcp_cntrl%d = tcp_cntrl" % i
)
485 # Add controllers and sequencers to the appropriate lists
487 cpu_sequencers
.append(tcp_cntrl
.coalescer
)
488 tcp_cntrl_nodes
.append(tcp_cntrl
)
490 # Connect the CP (TCP) controllers to the ruby network
491 tcp_cntrl
.requestFromTCP
= MessageBuffer(ordered
= True)
492 tcp_cntrl
.requestFromTCP
.master
= ruby_system
.network
.slave
494 tcp_cntrl
.responseFromTCP
= MessageBuffer(ordered
= True)
495 tcp_cntrl
.responseFromTCP
.master
= ruby_system
.network
.slave
497 tcp_cntrl
.unblockFromCore
= MessageBuffer()
498 tcp_cntrl
.unblockFromCore
.master
= ruby_system
.network
.slave
500 tcp_cntrl
.probeToTCP
= MessageBuffer(ordered
= True)
501 tcp_cntrl
.probeToTCP
.slave
= ruby_system
.network
.master
503 tcp_cntrl
.responseToTCP
= MessageBuffer(ordered
= True)
504 tcp_cntrl
.responseToTCP
.slave
= ruby_system
.network
.master
506 tcp_cntrl
.mandatoryQueue
= MessageBuffer()
508 gpuCluster
.add(tcp_cntrl
)
510 for i
in xrange(options
.num_sqc
):
512 sqc_cntrl
= SQCCntrl(TCC_select_num_bits
= TCC_bits
)
513 sqc_cntrl
.create(options
, ruby_system
, system
)
515 exec("system.sqc_cntrl%d = sqc_cntrl" % i
)
517 # Add controllers and sequencers to the appropriate lists
519 cpu_sequencers
.append(sqc_cntrl
.sequencer
)
521 # Connect the SQC controller to the ruby network
522 sqc_cntrl
.requestFromSQC
= MessageBuffer(ordered
= True)
523 sqc_cntrl
.requestFromSQC
.master
= ruby_system
.network
.slave
525 sqc_cntrl
.probeToSQC
= MessageBuffer(ordered
= True)
526 sqc_cntrl
.probeToSQC
.slave
= ruby_system
.network
.master
528 sqc_cntrl
.responseToSQC
= MessageBuffer(ordered
= True)
529 sqc_cntrl
.responseToSQC
.slave
= ruby_system
.network
.master
531 sqc_cntrl
.mandatoryQueue
= MessageBuffer()
533 # SQC also in GPU cluster
534 gpuCluster
.add(sqc_cntrl
)
536 # Because of wire buffers, num_tccs must equal num_tccdirs
539 for i
in xrange(options
.num_tccs
):
541 tcc_cntrl
= TCCCntrl()
542 tcc_cntrl
.create(options
, ruby_system
, system
)
543 tcc_cntrl
.l2_request_latency
= options
.gpu_to_dir_latency
544 tcc_cntrl
.l2_response_latency
= options
.TCC_latency
545 tcc_cntrl_nodes
.append(tcc_cntrl
)
546 tcc_cntrl
.WB
= options
.WB_L2
547 tcc_cntrl
.number_of_TBEs
= 2560 * options
.num_compute_units
549 # Connect the TCC controllers to the ruby network
550 tcc_cntrl
.requestFromTCP
= MessageBuffer(ordered
= True)
551 tcc_cntrl
.requestFromTCP
.slave
= ruby_system
.network
.master
553 tcc_cntrl
.responseToCore
= MessageBuffer(ordered
= True)
554 tcc_cntrl
.responseToCore
.master
= ruby_system
.network
.slave
556 tcc_cntrl
.probeFromNB
= MessageBuffer()
557 tcc_cntrl
.probeFromNB
.slave
= ruby_system
.network
.master
559 tcc_cntrl
.responseFromNB
= MessageBuffer()
560 tcc_cntrl
.responseFromNB
.slave
= ruby_system
.network
.master
562 tcc_cntrl
.requestToNB
= MessageBuffer(ordered
= True)
563 tcc_cntrl
.requestToNB
.master
= ruby_system
.network
.slave
565 tcc_cntrl
.responseToNB
= MessageBuffer()
566 tcc_cntrl
.responseToNB
.master
= ruby_system
.network
.slave
568 tcc_cntrl
.unblockToNB
= MessageBuffer()
569 tcc_cntrl
.unblockToNB
.master
= ruby_system
.network
.slave
571 tcc_cntrl
.triggerQueue
= MessageBuffer(ordered
= True)
573 exec("system.tcc_cntrl%d = tcc_cntrl" % i
)
574 # connect all of the wire buffers between L3 and dirs up
575 # TCC cntrls added to the GPU cluster
576 gpuCluster
.add(tcc_cntrl
)
578 # Assuming no DMA devices
579 assert(len(dma_devices
) == 0)
581 # Add cpu/gpu clusters to main cluster
582 mainCluster
.add(cpuCluster
)
583 mainCluster
.add(gpuCluster
)
585 ruby_system
.network
.number_of_virtual_networks
= 10
587 return (cpu_sequencers
, dir_cntrl_nodes
, mainCluster
)