configs/ruby/GPU_VIPER_Region.py

   1 # Copyright (c) 2015 Advanced Micro Devices, Inc.
   2 # All rights reserved.
   3 #
   4 # For use for simulation and test purposes only
   5 #
   6 # Redistribution and use in source and binary forms, with or without
   7 # modification, are permitted provided that the following conditions are met:
   8 #
   9 # 1. Redistributions of source code must retain the above copyright notice,
  10 # this list of conditions and the following disclaimer.
  11 #
  12 # 2. Redistributions in binary form must reproduce the above copyright notice,
  13 # this list of conditions and the following disclaimer in the documentation
  14 # and/or other materials provided with the distribution.
  15 #
  16 # 3. Neither the name of the copyright holder nor the names of its
  17 # contributors may be used to endorse or promote products derived from this
  18 # software without specific prior written permission.
  19 #
  20 # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  21 # AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  22 # IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  23 # ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
  24 # LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  25 # CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  26 # SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  27 # INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  28 # CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  29 # ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  30 # POSSIBILITY OF SUCH DAMAGE.
  31
  32 import math
  33 import m5
  34 from m5.objects import *
  35 from m5.defines import buildEnv
  36 from m5.util import addToPath
  37 from Ruby import send_evicts
  38
  39 addToPath('../')
  40
  41 from topologies.Cluster import Cluster
  42
  43 class CntrlBase:
  44     _seqs = 0
  45     @classmethod
  46     def seqCount(cls):
  47         # Use SeqCount not class since we need global count
  48         CntrlBase._seqs += 1
  49         return CntrlBase._seqs - 1
  50
  51     _cntrls = 0
  52     @classmethod
  53     def cntrlCount(cls):
  54         # Use CntlCount not class since we need global count
  55         CntrlBase._cntrls += 1
  56         return CntrlBase._cntrls - 1
  57
  58     _version = 0
  59     @classmethod
  60     def versionCount(cls):
  61         cls._version += 1 # Use count for this particular type
  62         return cls._version - 1
  63
  64 #
  65 # Note: the L1 Cache latency is only used by the sequencer on fast path hits
  66 #
  67 class L1Cache(RubyCache):
  68     resourceStalls = False
  69     dataArrayBanks = 2
  70     tagArrayBanks = 2
  71     dataAccessLatency = 1
  72     tagAccessLatency = 1
  73     def create(self, size, assoc, options):
  74         self.size = MemorySize(size)
  75         self.assoc = assoc
  76         self.replacement_policy = TreePLRURP()
  77
  78 class L2Cache(RubyCache):
  79     resourceStalls = False
  80     assoc = 16
  81     dataArrayBanks = 16
  82     tagArrayBanks = 16
  83     def create(self, size, assoc, options):
  84         self.size = MemorySize(size)
  85         self.assoc = assoc
  86         self.replacement_policy = TreePLRURP()
  87
  88 class CPCntrl(CorePair_Controller, CntrlBase):
  89
  90     def create(self, options, ruby_system, system):
  91         self.version = self.versionCount()
  92
  93         self.L1Icache = L1Cache()
  94         self.L1Icache.create(options.l1i_size, options.l1i_assoc, options)
  95         self.L1D0cache = L1Cache()
  96         self.L1D0cache.create(options.l1d_size, options.l1d_assoc, options)
  97         self.L1D1cache = L1Cache()
  98         self.L1D1cache.create(options.l1d_size, options.l1d_assoc, options)
  99         self.L2cache = L2Cache()
 100         self.L2cache.create(options.l2_size, options.l2_assoc, options)
 101
 102         self.sequencer = RubySequencer()
 103         self.sequencer.version = self.seqCount()
 104         self.sequencer.icache = self.L1Icache
 105         self.sequencer.dcache = self.L1D0cache
 106         self.sequencer.ruby_system = ruby_system
 107         self.sequencer.coreid = 0
 108         self.sequencer.is_cpu_sequencer = True
 109
 110         self.sequencer1 = RubySequencer()
 111         self.sequencer1.version = self.seqCount()
 112         self.sequencer1.icache = self.L1Icache
 113         self.sequencer1.dcache = self.L1D1cache
 114         self.sequencer1.ruby_system = ruby_system
 115         self.sequencer1.coreid = 1
 116         self.sequencer1.is_cpu_sequencer = True
 117
 118         self.issue_latency = 1
 119         self.send_evictions = send_evicts(options)
 120
 121         self.ruby_system = ruby_system
 122
 123         if options.recycle_latency:
 124             self.recycle_latency = options.recycle_latency
 125
 126 class TCPCache(RubyCache):
 127     size = "16kB"
 128     assoc = 16
 129     dataArrayBanks = 16
 130     tagArrayBanks = 16
 131     dataAccessLatency = 4
 132     tagAccessLatency = 1
 133     def create(self, options):
 134         self.size = MemorySize(options.tcp_size)
 135         self.dataArrayBanks = 16
 136         self.tagArrayBanks = 16
 137         self.dataAccessLatency = 4
 138         self.tagAccessLatency = 1
 139         self.resourceStalls = options.no_tcc_resource_stalls
 140         self.replacement_policy = TreePLRURP(num_leaves = self.assoc)
 141
 142 class TCPCntrl(TCP_Controller, CntrlBase):
 143
 144     def create(self, options, ruby_system, system):
 145         self.version = self.versionCount()
 146         self.L1cache = TCPCache(dataAccessLatency = options.TCP_latency)
 147         self.L1cache.create(options)
 148         self.issue_latency = 1
 149
 150         self.coalescer = VIPERCoalescer()
 151         self.coalescer.version = self.seqCount()
 152         self.coalescer.icache = self.L1cache
 153         self.coalescer.dcache = self.L1cache
 154         self.coalescer.ruby_system = ruby_system
 155         self.coalescer.support_inst_reqs = False
 156         self.coalescer.is_cpu_sequencer = False
 157         if options.tcp_deadlock_threshold:
 158           self.coalescer.deadlock_threshold = \
 159             options.tcp_deadlock_threshold
 160         self.coalescer.max_coalesces_per_cycle = \
 161             options.max_coalesces_per_cycle
 162
 163         self.sequencer = RubySequencer()
 164         self.sequencer.version = self.seqCount()
 165         self.sequencer.icache = self.L1cache
 166         self.sequencer.dcache = self.L1cache
 167         self.sequencer.ruby_system = ruby_system
 168         self.sequencer.is_cpu_sequencer = True
 169
 170         self.use_seq_not_coal = False
 171
 172         self.ruby_system = ruby_system
 173         if options.recycle_latency:
 174             self.recycle_latency = options.recycle_latency
 175
 176 class SQCCache(RubyCache):
 177     dataArrayBanks = 8
 178     tagArrayBanks = 8
 179     dataAccessLatency = 1
 180     tagAccessLatency = 1
 181
 182     def create(self, options):
 183         self.size = MemorySize(options.sqc_size)
 184         self.assoc = options.sqc_assoc
 185         self.replacement_policy = TreePLRURP(num_leaves = self.assoc)
 186
 187 class SQCCntrl(SQC_Controller, CntrlBase):
 188
 189     def create(self, options, ruby_system, system):
 190         self.version = self.versionCount()
 191         self.L1cache = SQCCache()
 192         self.L1cache.create(options)
 193         self.L1cache.resourceStalls = False
 194         self.sequencer = RubySequencer()
 195         self.sequencer.version = self.seqCount()
 196         self.sequencer.icache = self.L1cache
 197         self.sequencer.dcache = self.L1cache
 198         self.sequencer.ruby_system = ruby_system
 199         self.sequencer.support_data_reqs = False
 200         self.sequencer.is_cpu_sequencer = False
 201         if options.sqc_deadlock_threshold:
 202           self.sequencer.deadlock_threshold = \
 203             options.sqc_deadlock_threshold
 204
 205         self.ruby_system = ruby_system
 206         if options.recycle_latency:
 207             self.recycle_latency = options.recycle_latency
 208
 209 class TCC(RubyCache):
 210     size = MemorySize("256kB")
 211     assoc = 16
 212     dataAccessLatency = 8
 213     tagAccessLatency = 2
 214     resourceStalls = False
 215     def create(self, options):
 216         self.assoc = options.tcc_assoc
 217         if hasattr(options, 'bw_scalor') and options.bw_scalor > 0:
 218           s = options.num_compute_units
 219           tcc_size = s * 128
 220           tcc_size = str(tcc_size)+'kB'
 221           self.size = MemorySize(tcc_size)
 222           self.dataArrayBanks = 64
 223           self.tagArrayBanks = 64
 224         else:
 225           self.size = MemorySize(options.tcc_size)
 226           self.dataArrayBanks = 256 / options.num_tccs #number of data banks
 227           self.tagArrayBanks = 256 / options.num_tccs #number of tag banks
 228         self.size.value = self.size.value / options.num_tccs
 229         if ((self.size.value / long(self.assoc)) < 128):
 230             self.size.value = long(128 * self.assoc)
 231         self.start_index_bit = math.log(options.cacheline_size, 2) + \
 232                                math.log(options.num_tccs, 2)
 233         self.replacement_policy = TreePLRURP(num_leaves = self.assoc)
 234
 235 class TCCCntrl(TCC_Controller, CntrlBase):
 236     def create(self, options, ruby_system, system):
 237         self.version = self.versionCount()
 238         self.L2cache = TCC()
 239         self.L2cache.create(options)
 240         self.ruby_system = ruby_system
 241         if options.recycle_latency:
 242             self.recycle_latency = options.recycle_latency
 243
 244 class L3Cache(RubyCache):
 245     dataArrayBanks = 16
 246     tagArrayBanks = 16
 247
 248     def create(self, options, ruby_system, system):
 249         self.size = MemorySize(options.l3_size)
 250         self.size.value /= options.num_dirs
 251         self.assoc = options.l3_assoc
 252         self.dataArrayBanks /= options.num_dirs
 253         self.tagArrayBanks /= options.num_dirs
 254         self.dataArrayBanks /= options.num_dirs
 255         self.tagArrayBanks /= options.num_dirs
 256         self.dataAccessLatency = options.l3_data_latency
 257         self.tagAccessLatency = options.l3_tag_latency
 258         self.resourceStalls = False
 259         self.replacement_policy = TreePLRURP(num_leaves = self.assoc)
 260
 261 class L3Cntrl(L3Cache_Controller, CntrlBase):
 262     def create(self, options, ruby_system, system):
 263         self.version = self.versionCount()
 264         self.L3cache = L3Cache()
 265         self.L3cache.create(options, ruby_system, system)
 266         self.l3_response_latency = \
 267             max(self.L3cache.dataAccessLatency, self.L3cache.tagAccessLatency)
 268         self.ruby_system = ruby_system
 269         if options.recycle_latency:
 270             self.recycle_latency = options.recycle_latency
 271
 272     def connectWireBuffers(self, req_to_dir, resp_to_dir, l3_unblock_to_dir,
 273                            req_to_l3, probe_to_l3, resp_to_l3):
 274         self.reqToDir = req_to_dir
 275         self.respToDir = resp_to_dir
 276         self.l3UnblockToDir = l3_unblock_to_dir
 277         self.reqToL3 = req_to_l3
 278         self.probeToL3 = probe_to_l3
 279         self.respToL3 = resp_to_l3
 280
 281 # Directory memory: Directory memory of infinite size which is
 282 # used by directory controller to store the "states" of the
 283 # state machine. The state machine is implemented per cache block
 284 class DirMem(RubyDirectoryMemory, CntrlBase):
 285     def create(self, options, ruby_system, system):
 286         self.version = self.versionCount()
 287         phys_mem_size = AddrRange(options.mem_size).size()
 288         mem_module_size = phys_mem_size / options.num_dirs
 289         dir_size = MemorySize('0B')
 290         dir_size.value = mem_module_size
 291         self.size = dir_size
 292
 293 # Directory controller: Contains directory memory, L3 cache and associated state
 294 # machine which is used to accurately redirect a data request to L3 cache or to
 295 # memory. The permissions requests do not come to this directory for region
 296 # based protocols as they are handled exclusively by the region directory.
 297 # However, region directory controller uses this directory controller for
 298 # sending probe requests and receiving probe responses.
 299 class DirCntrl(Directory_Controller, CntrlBase):
 300     def create(self, options, ruby_system, system):
 301         self.version = self.versionCount()
 302         self.response_latency = 25
 303         self.response_latency_regionDir = 1
 304         self.directory = DirMem()
 305         self.directory.create(options, ruby_system, system)
 306         self.L3CacheMemory = L3Cache()
 307         self.L3CacheMemory.create(options, ruby_system, system)
 308         self.l3_hit_latency = \
 309             max(self.L3CacheMemory.dataAccessLatency,
 310             self.L3CacheMemory.tagAccessLatency)
 311
 312         self.ruby_system = ruby_system
 313         if options.recycle_latency:
 314             self.recycle_latency = options.recycle_latency
 315
 316     def connectWireBuffers(self, req_to_dir, resp_to_dir, l3_unblock_to_dir,
 317                            req_to_l3, probe_to_l3, resp_to_l3):
 318         self.reqToDir = req_to_dir
 319         self.respToDir = resp_to_dir
 320         self.l3UnblockToDir = l3_unblock_to_dir
 321         self.reqToL3 = req_to_l3
 322         self.probeToL3 = probe_to_l3
 323         self.respToL3 = resp_to_l3
 324
 325 # Region directory : Stores region permissions
 326 class RegionDir(RubyCache):
 327
 328     def create(self, options, ruby_system, system):
 329         self.block_size = "%dB" % (64 * options.blocks_per_region)
 330         self.size = options.region_dir_entries * \
 331             self.block_size * options.num_compute_units
 332         self.assoc = 8
 333         self.tagArrayBanks = 8
 334         self.tagAccessLatency = options.dir_tag_latency
 335         self.dataAccessLatency = 1
 336         self.resourceStalls = options.no_resource_stalls
 337         self.start_index_bit = 6 + int(math.log(options.blocks_per_region, 2))
 338         self.replacement_policy = TreePLRURP(num_leaves = self.assoc)
 339 # Region directory controller : Contains region directory and associated state
 340 # machine for dealing with region coherence requests.
 341 class RegionCntrl(RegionDir_Controller, CntrlBase):
 342     def create(self, options, ruby_system, system):
 343         self.version = self.versionCount()
 344         self.cacheMemory = RegionDir()
 345         self.cacheMemory.create(options, ruby_system, system)
 346         self.blocksPerRegion = options.blocks_per_region
 347         self.toDirLatency = \
 348             max(self.cacheMemory.dataAccessLatency,
 349             self.cacheMemory.tagAccessLatency)
 350         self.ruby_system = ruby_system
 351         self.always_migrate = options.always_migrate
 352         self.sym_migrate = options.symmetric_migrate
 353         self.asym_migrate = options.asymmetric_migrate
 354         if self.always_migrate:
 355             assert(not self.asym_migrate and not self.sym_migrate)
 356         if self.sym_migrate:
 357             assert(not self.always_migrate and not self.asym_migrate)
 358         if self.asym_migrate:
 359             assert(not self.always_migrate and not self.sym_migrate)
 360         if options.recycle_latency:
 361             self.recycle_latency = options.recycle_latency
 362
 363 # Region Buffer: A region directory cache which avoids some potential
 364 # long latency lookup of region directory for getting region permissions
 365 class RegionBuffer(RubyCache):
 366     assoc = 4
 367     dataArrayBanks = 256
 368     tagArrayBanks = 256
 369     dataAccessLatency = 1
 370     tagAccessLatency = 1
 371     resourceStalls = True
 372
 373 class RBCntrl(RegionBuffer_Controller, CntrlBase):
 374     def create(self, options, ruby_system, system):
 375         self.version = self.versionCount()
 376         self.cacheMemory = RegionBuffer()
 377         self.cacheMemory.resourceStalls = options.no_tcc_resource_stalls
 378         self.cacheMemory.dataArrayBanks = 64
 379         self.cacheMemory.tagArrayBanks = 64
 380         self.blocksPerRegion = options.blocks_per_region
 381         self.cacheMemory.block_size = "%dB" % (64 * self.blocksPerRegion)
 382         self.cacheMemory.start_index_bit = \
 383             6 + int(math.log(self.blocksPerRegion, 2))
 384         self.cacheMemory.size = options.region_buffer_entries * \
 385             self.cacheMemory.block_size * options.num_compute_units
 386         self.toDirLatency = options.gpu_to_dir_latency
 387         self.toRegionDirLatency = options.cpu_to_dir_latency
 388         self.noTCCdir = True
 389         TCC_bits = int(math.log(options.num_tccs, 2))
 390         self.TCC_select_num_bits = TCC_bits
 391         self.ruby_system = ruby_system
 392
 393         if options.recycle_latency:
 394             self.recycle_latency = options.recycle_latency
 395         self.cacheMemory.replacement_policy = \
 396             TreePLRURP(num_leaves = self.cacheMemory.assoc)
 397
 398 def define_options(parser):
 399     parser.add_option("--num-subcaches", type="int", default=4)
 400     parser.add_option("--l3-data-latency", type="int", default=20)
 401     parser.add_option("--l3-tag-latency", type="int", default=15)
 402     parser.add_option("--cpu-to-dir-latency", type="int", default=120)
 403     parser.add_option("--gpu-to-dir-latency", type="int", default=60)
 404     parser.add_option("--no-resource-stalls", action="store_false",
 405                       default=True)
 406     parser.add_option("--no-tcc-resource-stalls", action="store_false",
 407                       default=True)
 408     parser.add_option("--num-tbes", type="int", default=32)
 409     parser.add_option("--l2-latency", type="int", default=50) # load to use
 410     parser.add_option("--num-tccs", type="int", default=1,
 411                       help="number of TCC banks in the GPU")
 412
 413     parser.add_option("--sqc-size", type='string', default='32kB',
 414                       help="SQC cache size")
 415     parser.add_option("--sqc-assoc", type='int', default=8,
 416                       help="SQC cache assoc")
 417     parser.add_option("--sqc-deadlock-threshold", type='int',
 418                       help="Set the SQC deadlock threshold to some value")
 419
 420     parser.add_option("--WB_L1", action="store_true",
 421         default=False, help="L2 Writeback Cache")
 422     parser.add_option("--WB_L2", action="store_true",
 423         default=False, help="L2 Writeback Cache")
 424     parser.add_option("--TCP_latency",
 425         type="int", default=4, help="TCP latency")
 426     parser.add_option("--TCC_latency",
 427         type="int", default=16, help="TCC latency")
 428     parser.add_option("--tcc-size", type='string', default='2MB',
 429                       help="agregate tcc size")
 430     parser.add_option("--tcc-assoc", type='int', default=16,
 431                       help="tcc assoc")
 432     parser.add_option("--tcp-size", type='string', default='16kB',
 433                       help="tcp size")
 434     parser.add_option("--tcp-deadlock-threshold", type='int',
 435                       help="Set the TCP deadlock threshold to some value")
 436     parser.add_option("--max-coalesces-per-cycle", type="int", default=1,
 437                       help="Maximum insts that may coalesce in a cycle");
 438
 439     parser.add_option("--dir-tag-latency", type="int", default=4)
 440     parser.add_option("--dir-tag-banks", type="int", default=4)
 441     parser.add_option("--blocks-per-region", type="int", default=16)
 442     parser.add_option("--dir-entries", type="int", default=8192)
 443
 444     # Region buffer is a cache of region directory. Hence region
 445     # directory is inclusive with respect to region directory.
 446     # However, region directory is non-inclusive with respect to
 447     # the caches in the system
 448     parser.add_option("--region-dir-entries", type="int", default=1024)
 449     parser.add_option("--region-buffer-entries", type="int", default=512)
 450
 451     parser.add_option("--always-migrate",
 452         action="store_true", default=False)
 453     parser.add_option("--symmetric-migrate",
 454         action="store_true", default=False)
 455     parser.add_option("--asymmetric-migrate",
 456         action="store_true", default=False)
 457     parser.add_option("--use-L3-on-WT", action="store_true", default=False)
 458
 459 def create_system(options, full_system, system, dma_devices, bootmem,
 460                   ruby_system):
 461     if buildEnv['PROTOCOL'] != 'GPU_VIPER_Region':
 462         panic("This script requires the GPU_VIPER_Region protocol to be built.")
 463
 464     cpu_sequencers = []
 465
 466     #
 467     # The ruby network creation expects the list of nodes in the system to be
 468     # consistent with the NetDest list.  Therefore the l1 controller nodes
 469     # must be listed before the directory nodes and directory nodes before
 470     # dma nodes, etc.
 471     #
 472     dir_cntrl_nodes = []
 473
 474     # For an odd number of CPUs, still create the right number of controllers
 475     TCC_bits = int(math.log(options.num_tccs, 2))
 476
 477     #
 478     # Must create the individual controllers before the network to ensure the
 479     # controller constructors are called before the network constructor
 480     #
 481
 482     # For an odd number of CPUs, still create the right number of controllers
 483     crossbar_bw = 16 * options.num_compute_units #Assuming a 2GHz clock
 484     cpuCluster = Cluster(extBW = (crossbar_bw), intBW=crossbar_bw)
 485     for i in range((options.num_cpus + 1) // 2):
 486
 487         cp_cntrl = CPCntrl()
 488         cp_cntrl.create(options, ruby_system, system)
 489
 490         rb_cntrl = RBCntrl()
 491         rb_cntrl.create(options, ruby_system, system)
 492         rb_cntrl.number_of_TBEs = 256
 493         rb_cntrl.isOnCPU = True
 494
 495         cp_cntrl.regionBufferNum = rb_cntrl.version
 496
 497         exec("system.cp_cntrl%d = cp_cntrl" % i)
 498         exec("system.rb_cntrl%d = rb_cntrl" % i)
 499         #
 500         # Add controllers and sequencers to the appropriate lists
 501         #
 502         cpu_sequencers.extend([cp_cntrl.sequencer, cp_cntrl.sequencer1])
 503
 504         # Connect the CP controllers and the network
 505         cp_cntrl.requestFromCore = MessageBuffer()
 506         cp_cntrl.requestFromCore.master = ruby_system.network.slave
 507
 508         cp_cntrl.responseFromCore = MessageBuffer()
 509         cp_cntrl.responseFromCore.master = ruby_system.network.slave
 510
 511         cp_cntrl.unblockFromCore = MessageBuffer()
 512         cp_cntrl.unblockFromCore.master = ruby_system.network.slave
 513
 514         cp_cntrl.probeToCore = MessageBuffer()
 515         cp_cntrl.probeToCore.slave = ruby_system.network.master
 516
 517         cp_cntrl.responseToCore = MessageBuffer()
 518         cp_cntrl.responseToCore.slave = ruby_system.network.master
 519
 520         cp_cntrl.mandatoryQueue = MessageBuffer()
 521         cp_cntrl.triggerQueue = MessageBuffer(ordered = True)
 522
 523         # Connect the RB controllers to the ruby network
 524         rb_cntrl.requestFromCore = MessageBuffer(ordered = True)
 525         rb_cntrl.requestFromCore.slave = ruby_system.network.master
 526
 527         rb_cntrl.responseFromCore = MessageBuffer()
 528         rb_cntrl.responseFromCore.slave = ruby_system.network.master
 529
 530         rb_cntrl.requestToNetwork = MessageBuffer()
 531         rb_cntrl.requestToNetwork.master = ruby_system.network.slave
 532
 533         rb_cntrl.notifyFromRegionDir = MessageBuffer()
 534         rb_cntrl.notifyFromRegionDir.slave = ruby_system.network.master
 535
 536         rb_cntrl.probeFromRegionDir = MessageBuffer()
 537         rb_cntrl.probeFromRegionDir.slave = ruby_system.network.master
 538
 539         rb_cntrl.unblockFromDir = MessageBuffer()
 540         rb_cntrl.unblockFromDir.slave = ruby_system.network.master
 541
 542         rb_cntrl.responseToRegDir = MessageBuffer()
 543         rb_cntrl.responseToRegDir.master = ruby_system.network.slave
 544
 545         rb_cntrl.triggerQueue = MessageBuffer(ordered = True)
 546
 547         cpuCluster.add(cp_cntrl)
 548         cpuCluster.add(rb_cntrl)
 549
 550     gpuCluster = Cluster(extBW = (crossbar_bw), intBW = crossbar_bw)
 551     for i in range(options.num_compute_units):
 552
 553         tcp_cntrl = TCPCntrl(TCC_select_num_bits = TCC_bits,
 554                              issue_latency = 1,
 555                              number_of_TBEs = 2560)
 556         # TBEs set to max outstanding requests
 557         tcp_cntrl.create(options, ruby_system, system)
 558         tcp_cntrl.WB = options.WB_L1
 559         tcp_cntrl.disableL1 = False
 560
 561         exec("system.tcp_cntrl%d = tcp_cntrl" % i)
 562         #
 563         # Add controllers and sequencers to the appropriate lists
 564         #
 565         cpu_sequencers.append(tcp_cntrl.coalescer)
 566
 567         # Connect the CP (TCP) controllers to the ruby network
 568         tcp_cntrl.requestFromTCP = MessageBuffer(ordered = True)
 569         tcp_cntrl.requestFromTCP.master = ruby_system.network.slave
 570
 571         tcp_cntrl.responseFromTCP = MessageBuffer(ordered = True)
 572         tcp_cntrl.responseFromTCP.master = ruby_system.network.slave
 573
 574         tcp_cntrl.unblockFromCore = MessageBuffer()
 575         tcp_cntrl.unblockFromCore.master = ruby_system.network.slave
 576
 577         tcp_cntrl.probeToTCP = MessageBuffer(ordered = True)
 578         tcp_cntrl.probeToTCP.slave = ruby_system.network.master
 579
 580         tcp_cntrl.responseToTCP = MessageBuffer(ordered = True)
 581         tcp_cntrl.responseToTCP.slave = ruby_system.network.master
 582
 583         tcp_cntrl.mandatoryQueue = MessageBuffer()
 584
 585         gpuCluster.add(tcp_cntrl)
 586
 587     for i in range(options.num_sqc):
 588
 589         sqc_cntrl = SQCCntrl(TCC_select_num_bits = TCC_bits)
 590         sqc_cntrl.create(options, ruby_system, system)
 591
 592         exec("system.sqc_cntrl%d = sqc_cntrl" % i)
 593         #
 594         # Add controllers and sequencers to the appropriate lists
 595         #
 596         cpu_sequencers.append(sqc_cntrl.sequencer)
 597
 598         # Connect the SQC controller to the ruby network
 599         sqc_cntrl.requestFromSQC = MessageBuffer(ordered = True)
 600         sqc_cntrl.requestFromSQC.master = ruby_system.network.slave
 601
 602         sqc_cntrl.probeToSQC = MessageBuffer(ordered = True)
 603         sqc_cntrl.probeToSQC.slave = ruby_system.network.master
 604
 605         sqc_cntrl.responseToSQC = MessageBuffer(ordered = True)
 606         sqc_cntrl.responseToSQC.slave = ruby_system.network.master
 607
 608         sqc_cntrl.mandatoryQueue = MessageBuffer()
 609
 610         # SQC also in GPU cluster
 611         gpuCluster.add(sqc_cntrl)
 612
 613     numa_bit = 6
 614
 615     for i in range(options.num_tccs):
 616
 617         tcc_cntrl = TCCCntrl()
 618         tcc_cntrl.create(options, ruby_system, system)
 619         tcc_cntrl.l2_request_latency = 1
 620         tcc_cntrl.l2_response_latency = options.TCC_latency
 621         tcc_cntrl.WB = options.WB_L2
 622         tcc_cntrl.number_of_TBEs = 2560 * options.num_compute_units
 623
 624         # Connect the TCC controllers to the ruby network
 625         tcc_cntrl.requestFromTCP = MessageBuffer(ordered = True)
 626         tcc_cntrl.requestFromTCP.slave = ruby_system.network.master
 627
 628         tcc_cntrl.responseToCore = MessageBuffer(ordered = True)
 629         tcc_cntrl.responseToCore.master = ruby_system.network.slave
 630
 631         tcc_cntrl.probeFromNB = MessageBuffer()
 632         tcc_cntrl.probeFromNB.slave = ruby_system.network.master
 633
 634         tcc_cntrl.responseFromNB = MessageBuffer()
 635         tcc_cntrl.responseFromNB.slave = ruby_system.network.master
 636
 637         tcc_cntrl.requestToNB = MessageBuffer(ordered = True)
 638         tcc_cntrl.requestToNB.master = ruby_system.network.slave
 639
 640         tcc_cntrl.responseToNB = MessageBuffer()
 641         tcc_cntrl.responseToNB.master = ruby_system.network.slave
 642
 643         tcc_cntrl.unblockToNB = MessageBuffer()
 644         tcc_cntrl.unblockToNB.master = ruby_system.network.slave
 645
 646         tcc_cntrl.triggerQueue = MessageBuffer(ordered = True)
 647
 648         rb_cntrl = RBCntrl()
 649         rb_cntrl.create(options, ruby_system, system)
 650         rb_cntrl.number_of_TBEs = 2560 * options.num_compute_units
 651         rb_cntrl.isOnCPU = False
 652
 653         # Connect the RB controllers to the ruby network
 654         rb_cntrl.requestFromCore = MessageBuffer(ordered = True)
 655         rb_cntrl.requestFromCore.slave = ruby_system.network.master
 656
 657         rb_cntrl.responseFromCore = MessageBuffer()
 658         rb_cntrl.responseFromCore.slave = ruby_system.network.master
 659
 660         rb_cntrl.requestToNetwork = MessageBuffer()
 661         rb_cntrl.requestToNetwork.master = ruby_system.network.slave
 662
 663         rb_cntrl.notifyFromRegionDir = MessageBuffer()
 664         rb_cntrl.notifyFromRegionDir.slave = ruby_system.network.master
 665
 666         rb_cntrl.probeFromRegionDir = MessageBuffer()
 667         rb_cntrl.probeFromRegionDir.slave = ruby_system.network.master
 668
 669         rb_cntrl.unblockFromDir = MessageBuffer()
 670         rb_cntrl.unblockFromDir.slave = ruby_system.network.master
 671
 672         rb_cntrl.responseToRegDir = MessageBuffer()
 673         rb_cntrl.responseToRegDir.master = ruby_system.network.slave
 674
 675         rb_cntrl.triggerQueue = MessageBuffer(ordered = True)
 676
 677         tcc_cntrl.regionBufferNum = rb_cntrl.version
 678
 679         exec("system.tcc_cntrl%d = tcc_cntrl" % i)
 680         exec("system.tcc_rb_cntrl%d = rb_cntrl" % i)
 681
 682         # TCC cntrls added to the GPU cluster
 683         gpuCluster.add(tcc_cntrl)
 684         gpuCluster.add(rb_cntrl)
 685
 686     # Because of wire buffers, num_l3caches must equal num_dirs
 687     # Region coherence only works with 1 dir
 688     assert(options.num_l3caches == options.num_dirs == 1)
 689
 690     # This is the base crossbar that connects the L3s, Dirs, and cpu/gpu
 691     # Clusters
 692     mainCluster = Cluster(intBW = crossbar_bw)
 693
 694     dir_cntrl = DirCntrl()
 695     dir_cntrl.create(options, ruby_system, system)
 696     dir_cntrl.number_of_TBEs = 2560 * options.num_compute_units
 697     dir_cntrl.useL3OnWT = options.use_L3_on_WT
 698
 699     # Connect the Directory controller to the ruby network
 700     dir_cntrl.requestFromCores = MessageBuffer()
 701     dir_cntrl.requestFromCores.slave = ruby_system.network.master
 702
 703     dir_cntrl.responseFromCores = MessageBuffer()
 704     dir_cntrl.responseFromCores.slave = ruby_system.network.master
 705
 706     dir_cntrl.unblockFromCores = MessageBuffer()
 707     dir_cntrl.unblockFromCores.slave = ruby_system.network.master
 708
 709     dir_cntrl.probeToCore = MessageBuffer()
 710     dir_cntrl.probeToCore.master = ruby_system.network.slave
 711
 712     dir_cntrl.responseToCore = MessageBuffer()
 713     dir_cntrl.responseToCore.master = ruby_system.network.slave
 714
 715     dir_cntrl.reqFromRegBuf = MessageBuffer()
 716     dir_cntrl.reqFromRegBuf.slave = ruby_system.network.master
 717
 718     dir_cntrl.reqToRegDir = MessageBuffer(ordered = True)
 719     dir_cntrl.reqToRegDir.master = ruby_system.network.slave
 720
 721     dir_cntrl.reqFromRegDir = MessageBuffer(ordered = True)
 722     dir_cntrl.reqFromRegDir.slave = ruby_system.network.master
 723
 724     dir_cntrl.unblockToRegDir = MessageBuffer()
 725     dir_cntrl.unblockToRegDir.master = ruby_system.network.slave
 726
 727     dir_cntrl.triggerQueue = MessageBuffer(ordered = True)
 728     dir_cntrl.L3triggerQueue = MessageBuffer(ordered = True)
 729     dir_cntrl.requestToMemory = MessageBuffer()
 730     dir_cntrl.responseFromMemory = MessageBuffer()
 731
 732     exec("system.dir_cntrl%d = dir_cntrl" % i)
 733     dir_cntrl_nodes.append(dir_cntrl)
 734
 735     mainCluster.add(dir_cntrl)
 736
 737     reg_cntrl = RegionCntrl(noTCCdir=True,TCC_select_num_bits = TCC_bits)
 738     reg_cntrl.create(options, ruby_system, system)
 739     reg_cntrl.number_of_TBEs = options.num_tbes
 740     reg_cntrl.cpuRegionBufferNum = system.rb_cntrl0.version
 741     reg_cntrl.gpuRegionBufferNum = system.tcc_rb_cntrl0.version
 742
 743     # Connect the Region Dir controllers to the ruby network
 744     reg_cntrl.requestToDir = MessageBuffer(ordered = True)
 745     reg_cntrl.requestToDir.master = ruby_system.network.slave
 746
 747     reg_cntrl.notifyToRBuffer = MessageBuffer()
 748     reg_cntrl.notifyToRBuffer.master = ruby_system.network.slave
 749
 750     reg_cntrl.probeToRBuffer = MessageBuffer()
 751     reg_cntrl.probeToRBuffer.master = ruby_system.network.slave
 752
 753     reg_cntrl.responseFromRBuffer = MessageBuffer()
 754     reg_cntrl.responseFromRBuffer.slave = ruby_system.network.master
 755
 756     reg_cntrl.requestFromRegBuf = MessageBuffer()
 757     reg_cntrl.requestFromRegBuf.slave = ruby_system.network.master
 758
 759     reg_cntrl.triggerQueue = MessageBuffer(ordered = True)
 760
 761     exec("system.reg_cntrl%d = reg_cntrl" % i)
 762
 763     mainCluster.add(reg_cntrl)
 764
 765     # Assuming no DMA devices
 766     assert(len(dma_devices) == 0)
 767
 768     # Add cpu/gpu clusters to main cluster
 769     mainCluster.add(cpuCluster)
 770     mainCluster.add(gpuCluster)
 771
 772     ruby_system.network.number_of_virtual_networks = 10
 773
 774     return (cpu_sequencers, dir_cntrl_nodes, mainCluster)