c74e887a8d001aaf4c3b8a5951ea08ede1d4a884
1 # Copyright (c) 2012 ARM Limited
4 # The license below extends only to copyright in the software and shall
5 # not be construed as granting a license to any other intellectual
6 # property including but not limited to intellectual property relating
7 # to a hardware implementation of the functionality of the software
8 # licensed hereunder. You may use the software subject to the license
9 # terms below provided that you ensure that this notice is replicated
10 # unmodified and in its entirety in all distributions of the software,
11 # modified or unmodified, in source code or in binary form.
13 # Copyright (c) 2006-2007 The Regents of The University of Michigan
14 # Copyright (c) 2009 Advanced Micro Devices, Inc.
15 # All rights reserved.
17 # Redistribution and use in source and binary forms, with or without
18 # modification, are permitted provided that the following conditions are
19 # met: redistributions of source code must retain the above copyright
20 # notice, this list of conditions and the following disclaimer;
21 # redistributions in binary form must reproduce the above copyright
22 # notice, this list of conditions and the following disclaimer in the
23 # documentation and/or other materials provided with the distribution;
24 # neither the name of the copyright holders nor the names of its
25 # contributors may be used to endorse or promote products derived from
26 # this software without specific prior written permission.
28 # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 # Authors: Brad Beckmann
44 from m5
.objects
import *
45 from m5
.defines
import buildEnv
47 def define_options(parser
):
48 # By default, ruby uses the simple timing cpu
49 parser
.set_defaults(cpu_type
="timing")
51 parser
.add_option("--ruby-clock", action
="store", type="string",
53 help="Clock for blocks running at Ruby system's speed")
55 # Options related to cache structure
56 parser
.add_option("--ports", action
="store", type="int", default
=4,
57 help="used of transitions per cycle which is a proxy \
58 for the number of ports.")
60 # ruby network options
61 parser
.add_option("--topology", type="string", default
="Crossbar",
62 help="check src/mem/ruby/network/topologies for complete set")
63 parser
.add_option("--mesh-rows", type="int", default
=1,
64 help="the number of rows in the mesh topology")
65 parser
.add_option("--garnet-network", type="choice",
66 choices
=['fixed', 'flexible'], help="'fixed'|'flexible'")
67 parser
.add_option("--network-fault-model", action
="store_true", default
=False,
68 help="enable network fault model: see src/mem/ruby/network/fault_model/")
70 # ruby mapping options
71 parser
.add_option("--numa-high-bit", type="int", default
=0,
72 help="high order address bit to use for numa mapping. " \
73 "0 = highest bit, not specified = lowest bit")
75 # ruby sparse memory options
76 parser
.add_option("--use-map", action
="store_true", default
=False)
77 parser
.add_option("--map-levels", type="int", default
=4)
79 parser
.add_option("--recycle-latency", type="int", default
=10,
80 help="Recycle latency for ruby controller input buffers")
82 parser
.add_option("--random_seed", type="int", default
=1234,
83 help="Used for seeding the random number generator")
85 parser
.add_option("--ruby_stats", type="string", default
="ruby.stats")
87 protocol
= buildEnv
['PROTOCOL']
88 exec "import %s" % protocol
89 eval("%s.define_options(parser)" % protocol
)
91 def create_topology(controllers
, options
):
92 """ Called from create_system in configs/ruby/<protocol>.py
93 Must return an object which is a subclass of BaseTopology
94 found in configs/topologies/BaseTopology.py
95 This is a wrapper for the legacy topologies.
97 exec "import %s as Topo" % options
.topology
98 topology
= eval("Topo.%s(controllers)" % options
.topology
)
101 def create_system(options
, system
, piobus
= None, dma_ports
= []):
103 system
.ruby
= RubySystem(no_mem_vec
= options
.use_map
)
106 protocol
= buildEnv
['PROTOCOL']
107 exec "import %s" % protocol
109 (cpu_sequencers
, dir_cntrls
, topology
) = \
110 eval("%s.create_system(options, system, piobus, dma_ports, ruby)"
113 print "Error: could not create sytem for ruby protocol %s" % protocol
116 # Create a port proxy for connecting the system port. This is
117 # independent of the protocol and kept in the protocol-agnostic
119 sys_port_proxy
= RubyPortProxy(ruby_system
= ruby
)
120 # Give the system port proxy a SimObject parent without creating a
121 # full-fledged controller
122 system
.sys_port_proxy
= sys_port_proxy
124 # Connect the system port for loading of binaries etc
125 system
.system_port
= system
.sys_port_proxy
.slave
129 # Set the network classes based on the command line options
131 if options
.garnet_network
== "fixed":
132 class NetworkClass(GarnetNetwork_d
): pass
133 class IntLinkClass(GarnetIntLink_d
): pass
134 class ExtLinkClass(GarnetExtLink_d
): pass
135 class RouterClass(GarnetRouter_d
): pass
136 elif options
.garnet_network
== "flexible":
137 class NetworkClass(GarnetNetwork
): pass
138 class IntLinkClass(GarnetIntLink
): pass
139 class ExtLinkClass(GarnetExtLink
): pass
140 class RouterClass(GarnetRouter
): pass
142 class NetworkClass(SimpleNetwork
): pass
143 class IntLinkClass(SimpleIntLink
): pass
144 class ExtLinkClass(SimpleExtLink
): pass
145 class RouterClass(Switch
): pass
148 # Create the network topology
149 network
= NetworkClass(ruby_system
= ruby
, topology
= topology
.description
,
150 routers
= [], ext_links
= [], int_links
= [])
151 topology
.makeTopology(options
, network
, IntLinkClass
, ExtLinkClass
,
154 if options
.network_fault_model
:
155 assert(options
.garnet_network
== "fixed")
156 network
.enable_fault_model
= True
157 network
.fault_model
= FaultModel()
160 # Loop through the directory controlers.
161 # Determine the total memory size of the ruby system and verify it is equal
162 # to physmem. However, if Ruby memory is using sparse memory in SE
163 # mode, then the system should not back-up the memory state with
164 # the Memory Vector and thus the memory size bytes should stay at 0.
165 # Also set the numa bits to the appropriate values.
167 total_mem_size
= MemorySize('0B')
169 ruby
.block_size_bytes
= options
.cacheline_size
170 block_size_bits
= int(math
.log(options
.cacheline_size
, 2))
172 if options
.numa_high_bit
:
173 numa_bit
= options
.numa_high_bit
175 # if the numa_bit is not specified, set the directory bits as the
176 # lowest bits above the block offset bits, and the numa_bit as the
177 # highest of those directory bits
178 dir_bits
= int(math
.log(options
.num_dirs
, 2))
179 numa_bit
= block_size_bits
+ dir_bits
- 1
181 for dir_cntrl
in dir_cntrls
:
182 total_mem_size
.value
+= dir_cntrl
.directory
.size
.value
183 dir_cntrl
.directory
.numa_high_bit
= numa_bit
185 phys_mem_size
= sum(map(lambda r
: r
.size(), system
.mem_ranges
))
186 assert(total_mem_size
.value
== phys_mem_size
)
188 ruby
.network
= network
189 ruby
.mem_size
= total_mem_size
190 ruby
._cpu
_ruby
_ports
= cpu_sequencers
191 ruby
.num_of_sequencers
= len(cpu_sequencers
)
192 ruby
.random_seed
= options
.random_seed