2 use ieee.std_logic_1164.all;
3 use ieee.numeric_std.all;
7 use work.glibc_random.all;
12 architecture behave of countzero_tb is
13 constant clk_period: time := 10 ns;
14 signal rs: std_ulogic_vector(63 downto 0);
15 signal is_32bit, count_right: std_ulogic := '0';
16 signal result: std_ulogic_vector(63 downto 0);
17 signal randno: std_ulogic_vector(63 downto 0);
20 zerocounter_0: entity work.zero_counter
24 count_right => count_right,
29 variable r: std_ulogic_vector(63 downto 0);
31 -- test with input = 0
32 report "test zero input";
33 rs <= (others => '0');
37 assert result = x"0000000000000040"
38 report "bad cntlzd 0 = " & to_hstring(result);
41 assert result = x"0000000000000040"
42 report "bad cnttzd 0 = " & to_hstring(result);
46 assert result = x"0000000000000020"
47 report "bad cntlzw 0 = " & to_hstring(result);
50 assert result = x"0000000000000020"
51 report "bad cnttzw 0 = " & to_hstring(result);
53 report "test cntlzd/w";
55 for j in 0 to 100 loop
62 assert to_integer(unsigned(result)) = i
63 report "bad cntlzd " & to_hstring(rs) & " -> " & to_hstring(result);
64 rs <= r(31 downto 0) & r(63 downto 32);
68 assert to_integer(unsigned(result)) = i
69 report "bad cntlzw " & to_hstring(rs) & " -> " & to_hstring(result);
71 assert to_integer(unsigned(result)) = 32
72 report "bad cntlzw " & to_hstring(rs) & " -> " & to_hstring(result);
74 r := '0' & r(63 downto 1);
78 report "test cnttzd/w";
80 for j in 0 to 100 loop
87 assert to_integer(unsigned(result)) = i
88 report "bad cnttzd " & to_hstring(rs) & " -> " & to_hstring(result);
92 assert to_integer(unsigned(result)) = i
93 report "bad cnttzw " & to_hstring(rs) & " -> " & to_hstring(result);
95 assert to_integer(unsigned(result)) = 32
96 report "bad cnttzw " & to_hstring(rs) & " -> " & to_hstring(result);
98 r := r(62 downto 0) & '0';
102 assert false report "end of test" severity failure;