1 2021-07-05 Alan Modra <amodra@gmail.com>
3 * mep.opc (macros): Make static and const.
4 (lookup_macro): Return and use const pointer.
5 (expand_macro): Make mac param const.
6 (expand_string): Make pmacro const.
8 2021-07-03 Nick Clifton <nickc@redhat.com>
10 * 2.37 release branch created.
12 2021-05-06 Stafford Horne <shorne@gmail.com>
15 * or1k.opc (or1k_imm16_relocs, parse_reloc): Define parse logic
16 for gotha() relocation.
18 2021-03-31 Alan Modra <amodra@gmail.com>
20 * frv.opc: Replace bfd_boolean with bool, FALSE with false, and
21 TRUE with true throughout.
23 2021-03-29 Alan Modra <amodra@gmail.com>
25 * frv.opc (frv_is_branch_major, frv_is_float_major),
26 (frv_is_media_major, frv_is_branch_insn, frv_is_float_insn),
27 (frv_is_media_insn, spr_valid): Correct prototypes.
29 2021-01-09 Nick Clifton <nickc@redhat.com>
31 * 2.36 release branch crated.
33 2020-10-05 Samanta Navarro <ferivoz@riseup.net>
35 * m32r.cpu: Fix spelling mistakes.
37 2020-09-18 David Faust <david.faust@oracle.com>
39 * bpf.cpu (insn-op-code-alu): Add SDIV and SMOD.
40 (define-alu-insn-bin, daib): Take ISAs as an argument.
41 (define-alu-instructions): Update calls to daib pmacro with
42 ISAs; add sdiv and smod.
44 2020-09-08 David Faust <david.faust@oracle.com>
46 * bpf.cpu (define-alu-instructions): Correct semantic operators
47 for div, mod to unsigned versions.
49 2020-09-01 Alan Modra <amodra@gmail.com>
51 * mep-core.cpu (f-8s8a2, f-12s4a2, f-17s16a2): Multiply signed
52 value by two rather than shifting left.
53 (f-24s5a2n): Similarly multiply signed f-24s5a2n-hi to extract.
55 2020-08-26 David Faust <david.faust@oracle.com>
57 * bpf.cpu (arch bpf): Add xbpf mach and isas.
58 (define-xbpf-isa) New pmacro.
59 (all-isas) Add xbpfle,xbpfbe.
60 (endian-isas): New pmacro.
62 (model xbpf-def): Likewise.
63 (h-gpr): Add xbpf mach.
64 (f-dstle, f-srcle, dstle, srcle): Add xbpfle isa.
65 (f-dstbe, f-srcbe, dstbe, srcbe): Add xbpfbe isa.
66 (define-alu-insn-un): Use new endian-isas pmacro.
67 (define-alu-insn-bin, define-alu-insn-mov): Likewise.
68 (define-endian-insn, define-lddw): Likewise.
69 (dlind, dxli, dxsi, dsti): Likewise.
70 (define-cond-jump-insn, define-call-insn): Likewise.
71 (define-atomic-insns): Likewise.
73 2020-07-04 Nick Clifton <nickc@redhat.com>
75 Binutils 2.35 branch created.
77 2020-06-25 David Faust <david.faust@oracle.com>
79 * bpf.cpu (f-offset16): Change type from INT to HI.
80 (dxli): Simplify memory access.
82 (define-endian-insn): Update c-call in semantics.
86 2020-06-02 Jose E. Marchesi <jose.marchesi@oracle.com>
88 * bpf.cpu (define-bpf-isa): Set base-insn-bitsize to 64.
89 * bpf.opc (bpf_print_insn): Do not set endian_code here.
91 2020-06-02 Jose E. Marchesi <jose.marchesi@oracle.com>
93 * mep.opc (print_slot_insn): Pass the insn endianness to
96 2020-05-28 Jose E. Marchesi <jose.marchesi@oracle.com>
97 David Faust <david.faust@oracle.com>
99 * bpf.cpu (define-alu-insn-un): Add definitions of semantics.
100 (define-alu-insn-mov): Likewise.
102 (define-alu-instructions): Likewise.
103 (define-endian-insn): Likewise.
104 (define-lddw): Likewise.
110 (define-ldstx-insns): Likewise.
111 (define-st-insns): Likewise.
112 (define-cond-jump-insn): Likewise.
114 (define-condjump-insns): Likewise.
115 (define-call-insn): Likewise.
118 (define-atomic-insns): Likewise.
119 (sem-exchange-and-add): New macro.
120 * bpf.cpu ("brkpt"): New instruction.
121 (bpfbf): Set word-bitsize to 32 and insn-endian big.
122 (h-gpr): Prefer r0 to `a' and r6 to `ctx'.
123 (h-pc): Expand definition.
124 * bpf.opc (bpf_print_insn): Set endian_code to BIG.
126 2020-05-21 Alan Modra <amodra@gmail.com>
128 * mep.opc (mep_cgen_expand_macros_and_parse_operand): Replace
129 "if (x) free (x)" with "free (x)".
131 2020-05-19 Stafford Horne <shorne@gmail.com>
134 * or1k.cpu (arch or1k): Remove or64 and or64nd machs.
135 (ORBIS-MACHS, ORFPX32-MACHS): Remove pmacros.
136 (cpu or1k64bf, mach or64, mach or64nd): Remove definitions.
137 * or1kcommon.cpu (h-fdr): Remove hardware.
138 * or1korfpx.cpu (rDDF, rADF, rBDF): Remove operand definitions.
139 (float-regreg-insn): Remove lf- mnemonic -d instruction pattern.
140 (float-setflag-insn-base): Remove lf-sf mnemonic -d pattern.
141 (float-cust-insn): Remove "lf-cust" cust-num "-d" pattern.
142 (lf-rem-d, lf-itof-d, lf-ftoi-d, lf-madd-d): Remove.
144 2020-02-16 David Faust <david.faust@oracle.com>
146 * bpf.cpu (define-cond-jump-insn): Renamed from djci.
147 (dcji) New version with support for JMP32
149 2020-02-03 Alan Modra <amodra@gmail.com>
151 * m32c.cpu (f-dsp-64-s16): Mask before shifting signed value.
153 2020-02-01 Alan Modra <amodra@gmail.com>
155 * frv.cpu (f-u12): Multiply rather than left shift signed values.
156 (f-label16, f-label24): Likewise.
158 2020-01-30 Alan Modra <amodra@gmail.com>
160 * m32c.cpu (f-src32-rn-unprefixed-QI): Shift before inverting.
161 (f-src32-rn-prefixed-QI, f-dst32-rn-unprefixed-QI): Likewise.
162 (f-dst32-rn-prefixed-QI): Likewise.
163 (f-dsp-32-s32): Mask before shifting left.
164 (f-dsp-48-u32, f-dsp-48-s32): Likewise.
165 (f-bitbase32-16-s11-unprefixed): Multiply signed field rather than
167 (f-bitbase32-24-s11-prefixed, f-bitbase32-24-s19-prefixed): Likewise.
168 (h-gr-SI): Mask before shifting.
170 2020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
172 * bpf.cpu (define-alu-insn-un): The unary BPF instructions
173 (neg and neg32) use OP_SRC_K even if they operate only in
176 2020-01-18 Nick Clifton <nickc@redhat.com>
178 Binutils 2.34 branch created.
180 2020-01-13 Alan Modra <amodra@gmail.com>
182 * fr30.cpu (f-disp9, f-disp10, f-s10, f-rel9, f-rel12): Don't
183 left shift signed values.
185 2020-01-06 Alan Modra <amodra@gmail.com>
187 * m32c.cpu (f-dsp-8-u16, f-dsp-8-s16): Rearrange to mask any sign
188 bits before shifting rather than masking after shifting.
189 (f-dsp-16-u16, f-dsp-16-s16, f-dsp-32-u16, f-dsp-32-s16): Likewise.
190 (f-dsp-40-u16, f-dsp-40-s16, f-dsp-48-u16, f-dsp-48-s16): Likewise.
191 (f-dsp-64-u16, f-dsp-8-s24): Likewise.
192 (f-bitbase32-16-s19-unprefixed): Avoid signed left shift.
194 2020-01-04 Alan Modra <amodra@gmail.com>
196 * m32r.cpu (f-disp8): Avoid left shift of negative values.
197 (f-disp16, f-disp24): Likewise.
199 2019-12-23 Alan Modra <amodra@gmail.com>
201 * iq2000.cpu (f-offset): Avoid left shift of negative values.
203 2019-12-20 Alan Modra <amodra@gmail.com>
205 * or1korbis.cpu (f-disp26, f-disp21): Don't left shift negative values.
207 2019-12-17 Alan Modra <amodra@gmail.com>
209 * bpf.cpu (f-imm64): Avoid signed overflow.
211 2019-12-16 Alan Modra <amodra@gmail.com>
213 * xstormy16.cpu (f-rel12a): Avoid signed overflow.
215 2019-12-11 Alan Modra <amodra@gmail.com>
217 * epiphany.cpu (f-sdisp11): Don't sign extend with shifts.
218 * lm32.cpu (f-branch, f-vall): Likewise.
219 * m32.cpu (f-lab-8-16): Likewise.
221 2019-12-11 Alan Modra <amodra@gmail.com>
223 * epiphany.cpu (f-simm8, f-simm24): Use multiply rather than
224 shift left to avoid UB on left shift of negative values.
226 2019-11-20 Jose E. Marchesi <jose.marchesi@oracle.com>
228 * bpf.cpu: Fix comment describing the 128-bit instruction format.
230 2019-09-09 Phil Blundell <pb@pbcl.net>
232 binutils 2.33 branch created.
234 2019-07-19 Jose E. Marchesi <jose.marchesi@oracle.com>
236 * bpf.cpu (h-gpr): when disassembling, use %r0 and %r6 instead of
239 2019-07-15 Jose E. Marchesi <jose.marchesi@oracle.com>
241 * bpf.cpu (dlabs): New pmacro.
244 2019-07-14 Jose E. Marchesi <jose.marchesi@oracle.com>
246 * bpf.cpu (dlsi): ldabs and ldind instructions do not take an
247 explicit 'dst' argument.
249 2019-06-13 Stafford Horne <shorne@gmail.com>
251 * or1korfpx.cpu (float-setflag-insn-base): Add 'sf' to symbol.
253 2019-06-13 Stafford Horne <shorne@gmail.com>
255 * or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a
256 (l-adrp): Improve comment.
258 2019-06-13 Stafford Horne <shorne@gmail.com>
260 * or1korfpx.cpu (insn-opcode-float-regreg): Add SFUEQ_S, SFUNE_S,
261 SFUGT_S, SFUGE_S, SFULT_S, SFULE_S, SFUN_S, SFUEQ_D, SFUNE_D, SFUGT_D,
262 SFUGE_D, SFULT_D, SFULE_D, SFUN_D opcodes.
263 (float-setflag-insn-base): New pmacro based on float-setflag-insn.
264 (float-setflag-symantics, float-setflag-unordered-cmp-symantics,
265 float-setflag-unordered-symantics): New pmacro for instruction
267 (float-setflag-insn): Update to use float-setflag-insn-base.
268 (float-setflag-unordered-insn): New pmacro for generating instructions.
270 2019-06-13 Andrey Bacherov <avbacherov@opencores.org>
271 Stafford Horne <shorne@gmail.com>
273 * or1k.cpu (ORFPX64A32-MACHS): New pmacro.
274 (ORFPX-MACHS): Removed pmacro.
275 * or1k.opc (or1k_cgen_insn_supported): New function.
276 (CGEN_VALIDATE_INSN_SUPPORTED): Define macro.
277 (parse_regpair, print_regpair): New functions.
278 * or1kcommon.cpu (h-spr, spr-shift, spr-address, h-gpr): Reorder
280 (h-fdr): Update comment to indicate or64.
281 (reg-pair-reg-lo, reg-pair-reg-hi): New pmacros for register pairs.
282 (h-fd32r): New hardware for 64-bit fpu registers.
283 (h-i64r): New hardware for 64-bit int registers.
284 * or1korbis.cpu (f-resv-8-1): New field.
285 * or1korfpx.cpu (rDSF, rASF, rBSF): Update attribute to ORFPX32-MACHS.
286 (rDDF, rADF, rBDF): Update operand comment to indicate or64.
287 (f-rdoff-10-1, f-raoff-9-1, f-rboff-8-1): New fields.
288 (h-roff1): New hardware.
289 (double-field-and-ops mnemonic): New pmacro to generate operations
290 rDD32F, rAD32F, rBD32F, rDDI and rADI.
291 (float-regreg-insn): Update single precision generator to MACH
292 ORFPX32-MACHS. Add generator for or32 64-bit instructions.
293 (float-setflag-insn): Update single precision generator to MACH
294 ORFPX32-MACHS. Fix double instructions from single to double
295 precision. Add generator for or32 64-bit instructions.
296 (float-cust-insn cust-num): Update single precision generator to MACH
297 ORFPX32-MACHS. Add generator for or32 64-bit instructions.
298 (lf-rem-s, lf-itof-s, lf-ftoi-s, lf-madd-s): Update MACH to
300 (lf-rem-d): Fix operation from mod to rem.
301 (lf-rem-d32, lf-itof-d32, lf-ftoi-d32, lf-madd-d32): New instruction.
302 (lf-itof-d): Fix operands from single to double.
303 (lf-ftoi-d): Update operand mode from DI to WI.
305 2019-05-23 Jose E. Marchesi <jose.marchesi@oracle.com>
310 2018-06-24 Nick Clifton <nickc@redhat.com>
314 2018-10-05 Richard Henderson <rth@twiddle.net>
315 Stafford Horne <shorne@gmail.com>
317 * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
318 (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
319 (l-mul): Fix overflow support and indentation.
320 (l-mulu): Fix overflow support and indentation.
321 (l-muld, l-muldu, l-msbu, l-macu): New instructions.
322 (l-div); Remove incorrect carry behavior.
323 (l-divu): Fix carry and overflow behavior.
324 (l-mac): Add overflow support.
325 (l-msb, l-msbu): Add carry and overflow support.
327 2018-10-05 Richard Henderson <rth@twiddle.net>
329 * or1k.opc (parse_disp26): Add support for plta() relocations.
330 (parse_disp21): New function.
331 (or1k_rclass): New enum.
332 (or1k_rtype): New enum.
333 (or1k_imm16_relocs): Define new PO and SPO relocation mappings.
334 (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
335 (parse_imm16): Add support for the new 21bit and 13bit relocations.
336 * or1korbis.cpu (f-disp26): Don't assume SI.
337 (f-disp21): New pc-relative 21-bit 13 shifted to right.
338 (insn-opcode): Add ADRP.
339 (l-adrp): New instruction.
341 2018-10-05 Richard Henderson <rth@twiddle.net>
343 * or1k.opc: Add RTYPE_ enum.
344 (INVALID_STORE_RELOC): New string.
345 (or1k_imm16_relocs): New array array.
346 (parse_reloc): New static function that just does the parsing.
347 (parse_imm16): New static function for generic parsing.
348 (parse_simm16): Change to just call parse_imm16.
349 (parse_simm16_split): New function.
350 (parse_uimm16): Change to call parse_imm16.
351 (parse_uimm16_split): New function.
352 * or1korbis.cpu (simm16-split): Change to use new simm16_split.
353 (uimm16-split): Change to use new uimm16_split.
355 2018-07-24 Alan Modra <amodra@gmail.com>
358 * or1kcommon.cpu (spr-reg-indices): Fix description typo.
360 2018-05-09 Sebastian Rasmussen <sebras@gmail.com>
362 * or1kcommon.cpu (spr-reg-info): Typo fix.
364 2018-03-03 Alan Modra <amodra@gmail.com>
366 * frv.opc: Include opintl.h.
367 (add_next_to_vliw): Use opcodes_error_handler to print error.
368 Standardize error message.
369 (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
371 2018-01-13 Nick Clifton <nickc@redhat.com>
375 2017-03-15 Stafford Horne <shorne@gmail.com>
377 * or1kcommon.cpu: Add pc set semantics to also update ppc.
379 2016-10-06 Alan Modra <amodra@gmail.com>
381 * mep.opc (expand_string): Add fall through comment.
383 2016-03-03 Alan Modra <amodra@gmail.com>
385 * fr30.cpu (f-m4): Replace bogus comment with a better guess
386 at what is really going on.
388 2016-03-02 Alan Modra <amodra@gmail.com>
390 * fr30.cpu (f-m4): Replace -1 << 4 with -16.
392 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
394 * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
395 a constant to better align disassembler output.
397 2014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
399 * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
401 2014-06-12 Alan Modra <amodra@gmail.com>
403 * or1k.opc: Whitespace fixes.
405 2014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
407 * or1korbis.cpu (h-atomic-reserve): New hardware.
408 (h-atomic-address): Likewise.
409 (insn-opcode): Add opcodes for LWA and SWA.
410 (atomic-reserve): New operand.
411 (atomic-address): Likewise.
412 (l-lwa, l-swa): New instructions.
413 (l-lbs): Fix typo in comment.
414 (store-insn): Clear atomic reserve on store to atomic-address.
415 Fix register names in fmt field.
417 2014-04-22 Christian Svensson <blue@cmd.nu>
419 * openrisc.cpu: Delete.
420 * openrisc.opc: Delete.
421 * or1k.cpu: New file.
422 * or1k.opc: New file.
423 * or1kcommon.cpu: New file.
424 * or1korbis.cpu: New file.
425 * or1korfpx.cpu: New file.
427 2013-12-07 Mike Frysinger <vapier@gentoo.org>
429 * epiphany.opc: Remove +x file mode.
431 2013-03-08 Yann Sionneau <yann.sionneau@gmail.com>
434 * lm32.cpu (Control and status registers): Add CFG2, PSW,
435 TLBVADDR, TLBPADDR and TLBBADVADDR.
437 2012-11-30 Oleg Raikhman <oleg@adapteva.com>
438 Joern Rennecke <joern.rennecke@embecosm.com>
440 * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
441 (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
442 (testset-insn): Add NO_DIS attribute to t.l.
443 (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
444 (move-insns): Add NO-DIS attribute to cmov.l.
445 (op-mmr-movts): Add NO-DIS attribute to movts.l.
446 (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
447 (op-rrr): Add NO-DIS attribute to .l.
448 (shift-rrr): Add NO-DIS attribute to .l.
449 (op-shift-rri): Add NO-DIS attribute to i32.l.
450 (bitrl, movtl): Add NO-DIS attribute.
451 (op-iextrrr): Add NO-DIS attribute to .l
452 (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
453 (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
455 2012-02-27 Alan Modra <amodra@gmail.com>
457 * mt.opc (print_dollarhex): Trim values to 32 bits.
459 2011-12-15 Nick Clifton <nickc@redhat.com>
461 * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
464 2011-10-26 Joern Rennecke <joern.rennecke@embecosm.com>
466 * epiphany.opc (parse_branch_addr): Fix type of valuep.
467 Cast value before printing it as a long.
468 (parse_postindex): Fix type of valuep.
470 2011-10-25 Joern Rennecke <joern.rennecke@embecosm.com>
472 * cpu/epiphany.cpu: New file.
473 * cpu/epiphany.opc: New file.
475 2011-08-22 Nick Clifton <nickc@redhat.com>
477 * fr30.cpu: Newly contributed file.
478 * fr30.opc: Likewise.
479 * ip2k.cpu: Likewise.
480 * ip2k.opc: Likewise.
481 * mep-avc.cpu: Likewise.
482 * mep-avc2.cpu: Likewise.
483 * mep-c5.cpu: Likewise.
484 * mep-core.cpu: Likewise.
485 * mep-default.cpu: Likewise.
486 * mep-ext-cop.cpu: Likewise.
487 * mep-fmax.cpu: Likewise.
488 * mep-h1.cpu: Likewise.
489 * mep-ivc2.cpu: Likewise.
490 * mep-rhcop.cpu: Likewise.
491 * mep-sample-ucidsp.cpu: Likewise.
494 * openrisc.cpu: Likewise.
495 * openrisc.opc: Likewise.
496 * xstormy16.cpu: Likewise.
497 * xstormy16.opc: Likewise.
499 2010-10-08 Pierre Muller <muller@ics.u-strasbg.fr>
501 * frv.opc: #undef DEBUG.
503 2010-07-03 DJ Delorie <dj@delorie.com>
505 * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
507 2010-02-11 Doug Evans <dje@sebabeach.org>
509 * m32r.cpu (HASH-PREFIX): Delete.
510 (duhpo, dshpo): New pmacros.
511 (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
512 (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
513 attribute, define with dshpo.
514 (uimm24): Delete HASH-PREFIX attribute.
515 * m32r.opc (CGEN_PRINT_NORMAL): Delete.
516 (print_signed_with_hash_prefix): New function.
517 (print_unsigned_with_hash_prefix): New function.
518 * xc16x.cpu (dowh): New pmacro.
519 (upof16): Define with dowh, specify print handler.
520 (qbit, qlobit, qhibit): Ditto.
522 * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
523 (print_with_dot_prefix): New functions.
524 (print_with_pof_prefix, print_with_pag_prefix): New functions.
526 2010-01-24 Doug Evans <dje@sebabeach.org>
528 * frv.cpu (floating-point-conversion): Update call to fp conv op.
529 (floating-point-dual-conversion, ne-floating-point-dual-conversion,
530 conditional-floating-point-conversion, ne-floating-point-conversion,
531 float-parallel-mul-add-double-semantics): Ditto.
533 2010-01-05 Doug Evans <dje@sebabeach.org>
535 * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
536 (f-dsp-40-u20, f-dsp-40-u24): Ditto.
538 2010-01-02 Doug Evans <dje@sebabeach.org>
540 * m32c.opc (parse_signed16): Fix typo.
542 2009-12-11 Nick Clifton <nickc@redhat.com>
544 * frv.opc: Fix shadowed variable warnings.
545 * m32c.opc: Fix shadowed variable warnings.
547 2009-11-14 Doug Evans <dje@sebabeach.org>
549 Must use VOID expression in VOID context.
550 * xc16x.cpu (mov4): Fix mode of `sequence'.
551 (mov9, mov10): Ditto.
552 (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
553 (callr, callseg, calls, trap, rets, reti): Ditto.
554 (jb, jbc, jnb, jnbs): Fix mode of `if'. Comment out no-op `sll'.
555 (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
556 (exts, exts1, extsr, extsr1, prior): Ditto.
558 2009-10-23 Doug Evans <dje@sebabeach.org>
560 * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
561 cgen-ops.h -> cgen/basic-ops.h.
563 2009-09-25 Alan Modra <amodra@bigpond.net.au>
565 * m32r.cpu (stb-plus): Typo fix.
567 2009-09-23 Doug Evans <dje@sebabeach.org>
569 * m32r.cpu (sth-plus): Fix address mode and calculation.
571 (clrpsw): Fix mask calculation.
572 (bset, bclr, btst): Make mode in bit calculation match expression.
574 * xc16x.cpu (rtl-version): Set to 0.8.
575 (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
576 make uppercase. Remove unnecessary name-prefix spec.
577 (grb-names, conditioncode-names, extconditioncode-names): Ditto.
578 (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
579 (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
580 (h-cr): New hardware.
581 (muls): Comment out parts that won't compile, add fixme.
582 (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
583 (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
584 (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
586 2009-07-16 Doug Evans <dje@sebabeach.org>
588 * cpu/simplify.inc (*): One line doc strings don't need \n.
589 (df): Invoke define-full-ifield instead of claiming it's an alias.
591 (dnop): Mark as deprecated.
593 2009-06-22 Alan Modra <amodra@bigpond.net.au>
595 * m32c.opc (parse_lab_5_3): Use correct enum.
597 2009-01-07 Hans-Peter Nilsson <hp@axis.com>
599 * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
600 (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
601 (media-arith-sat-semantics): Explicitly sign- or zero-extend
602 arguments of "operation" to DI using "mode" and the new pmacros.
604 2009-01-03 Hans-Peter Nilsson <hp@axis.com>
606 * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
609 2008-12-23 Jon Beniston <jon@beniston.com>
611 * lm32.cpu: New file.
612 * lm32.opc: New file.
614 2008-01-29 Alan Modra <amodra@bigpond.net.au>
616 * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
619 2007-10-22 Hans-Peter Nilsson <hp@axis.com>
621 * cris.cpu (movs, movu): Use result of extension operation when
624 2007-07-04 Nick Clifton <nickc@redhat.com>
626 * cris.cpu: Update copyright notice to refer to GPLv3.
627 * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
628 m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
629 sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
631 * iq2000.cpu: Fix copyright notice to refer to FSF.
633 2007-04-30 Mark Salter <msalter@sadr.localdomain>
635 * frv.cpu (spr-names): Support new coprocessor SPR registers.
637 2007-04-20 Nick Clifton <nickc@redhat.com>
639 * xc16x.cpu: Restore after accidentally overwriting this file with
642 2007-03-29 DJ Delorie <dj@redhat.com>
644 * m32c.cpu (Imm-8-s4n): Fix print hook.
645 (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
646 (arith-jnz-imm4-dst-defn): Make relaxable.
647 (arith-jnz16-imm4-dst-defn): Fix encodings.
649 2007-03-20 DJ Delorie <dj@redhat.com>
651 * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
653 (src16-16-20-An-relative-*): New.
654 (dst16-*-20-An-relative-*): New.
655 (dst16-16-16sa-*): New
656 (dst16-16-16ar-*): New
657 (dst32-16-16sa-Unprefixed-*): New
658 (jsri): Fix operands.
659 (setzx): Fix encoding.
661 2007-03-08 Alan Modra <amodra@bigpond.net.au>
663 * m32r.opc: Formatting.
665 2006-05-22 Nick Clifton <nickc@redhat.com>
667 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
669 2006-04-10 DJ Delorie <dj@redhat.com>
671 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
672 decides if this function accepts symbolic constants or not.
673 (parse_signed_bitbase): Likewise.
674 (parse_unsigned_bitbase8): Pass the new parameter.
675 (parse_unsigned_bitbase11): Likewise.
676 (parse_unsigned_bitbase16): Likewise.
677 (parse_unsigned_bitbase19): Likewise.
678 (parse_unsigned_bitbase27): Likewise.
679 (parse_signed_bitbase8): Likewise.
680 (parse_signed_bitbase11): Likewise.
681 (parse_signed_bitbase19): Likewise.
683 2006-03-13 DJ Delorie <dj@redhat.com>
685 * m32c.cpu (Bit3-S): New.
687 * m32c.opc (parse_bit3_S): New.
689 * m32c.cpu (decimal-subtraction16-insn): Add second operand.
690 (btst): Add optional :G suffix for MACH32.
692 (pop.w:G): Add optional :G suffix for MACH16.
693 (push.b.imm): Fix syntax.
695 2006-03-10 DJ Delorie <dj@redhat.com>
697 * m32c.cpu (mul.l): New.
700 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
702 * xc16x.opc (parse_hash): Return NULL if the input was parsed or
703 an error message otherwise.
704 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
705 Fix up comments to correctly describe the functions.
707 2006-02-24 DJ Delorie <dj@redhat.com>
709 * m32c.cpu (RL_TYPE): New attribute, with macros.
710 (Lab-8-24): Add RELAX.
711 (unary-insn-defn-g, binary-arith-imm-dst-defn,
712 binary-arith-imm4-dst-defn): Add 1ADDR attribute.
713 (binary-arith-src-dst-defn): Add 2ADDR attribute.
714 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
715 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
717 (jsri16, jsri32): Add 1ADDR attribute.
718 (jsr32.w, jsr32.a): Add JUMP attribute.
720 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
721 Anil Paranjape <anilp1@kpitcummins.com>
722 Shilin Shakti <shilins@kpitcummins.com>
724 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
726 * xc16x.opc: New file containing supporting XC16C routines.
728 2006-02-10 Nick Clifton <nickc@redhat.com>
730 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
732 2006-01-06 DJ Delorie <dj@redhat.com>
734 * m32c.cpu (mov.w:q): Fix mode.
735 (push32.b.imm): Likewise, for the comment.
737 2005-12-16 Nathan Sidwell <nathan@codesourcery.com>
739 Second part of ms1 to mt renaming.
740 * mt.cpu (define-arch, define-isa): Set name to mt.
741 (define-mach): Adjust.
742 * mt.opc (CGEN_ASM_HASH): Update.
743 (mt_asm_hash, mt_cgen_insn_supported): Renamed.
744 (parse_loopsize, parse_imm16): Adjust.
746 2005-12-13 DJ Delorie <dj@redhat.com>
748 * m32c.cpu (jsri): Fix order so register names aren't treated as
750 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
751 indexwd, indexws): Fix encodings.
753 2005-12-12 Nathan Sidwell <nathan@codesourcery.com>
755 * mt.cpu: Rename from ms1.cpu.
756 * mt.opc: Rename from ms1.opc.
758 2005-12-06 Hans-Peter Nilsson <hp@axis.com>
760 * cris.cpu (simplecris-common-writable-specregs)
761 (simplecris-common-readable-specregs): Split from
762 simplecris-common-specregs. All users changed.
763 (cris-implemented-writable-specregs-v0)
764 (cris-implemented-readable-specregs-v0): Similar from
765 cris-implemented-specregs-v0.
766 (cris-implemented-writable-specregs-v3)
767 (cris-implemented-readable-specregs-v3)
768 (cris-implemented-writable-specregs-v8)
769 (cris-implemented-readable-specregs-v8)
770 (cris-implemented-writable-specregs-v10)
771 (cris-implemented-readable-specregs-v10)
772 (cris-implemented-writable-specregs-v32)
773 (cris-implemented-readable-specregs-v32): Similar.
774 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
775 insns and specializations.
777 2005-11-08 Nathan Sidwell <nathan@codesourcery.com>
780 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
782 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
783 f-cb2incr, f-rc3): New fields.
784 (LOOP): New instruction.
785 (JAL-HAZARD): New hazard.
786 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
788 (mul, muli, dbnz, iflush): Enable for ms2
789 (jal, reti): Has JAL-HAZARD.
790 (ldctxt, ldfb, stfb): Only ms1.
791 (fbcb): Only ms1,ms1-003.
792 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
793 fbcbincrs, mfbcbincrs): Enable for ms2.
794 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
795 * ms1.opc (parse_loopsize): New.
796 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
799 2005-10-28 Dave Brolley <brolley@redhat.com>
801 Contribute the following change:
802 2003-09-24 Dave Brolley <brolley@redhat.com>
804 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
805 CGEN_ATTR_VALUE_TYPE.
806 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
807 Use cgen_bitset_intersect_p.
809 2005-10-27 DJ Delorie <dj@redhat.com>
811 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
812 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
813 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
814 imm operand is needed.
815 (adjnz, sbjnz): Pass the right operands.
816 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
817 unary-insn): Add -g variants for opcodes that need to support :G.
818 (not.BW:G, push.BW:G): Call it.
819 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
820 stzx16-imm8-imm8-abs16): Fix operand typos.
821 * m32c.opc (m32c_asm_hash): Support bnCND.
822 (parse_signed4n, print_signed4n): New.
824 2005-10-26 DJ Delorie <dj@redhat.com>
826 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
827 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
828 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
830 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
831 (mov.BW:S r0,r1): Fix typo r1l->r1.
832 (tst): Allow :G suffix.
833 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
835 2005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
837 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
839 2005-10-25 DJ Delorie <dj@redhat.com>
841 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
842 making one a macro of the other.
844 2005-10-21 DJ Delorie <dj@redhat.com>
846 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
847 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
848 indexld, indexls): .w variants have `1' bit.
849 (rot32.b): QI, not SI.
850 (rot32.w): HI, not SI.
851 (xchg16): HI for .w variant.
853 2005-10-19 Nick Clifton <nickc@redhat.com>
855 * m32r.opc (parse_slo16): Fix bad application of previous patch.
857 2005-10-18 Andreas Schwab <schwab@suse.de>
859 * m32r.opc (parse_slo16): Better version of previous patch.
861 2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
863 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
866 2005-07-25 DJ Delorie <dj@redhat.com>
868 * m32c.opc (parse_unsigned8): Add %dsp8().
869 (parse_signed8): Add %hi8().
870 (parse_unsigned16): Add %dsp16().
871 (parse_signed16): Add %lo16() and %hi16().
872 (parse_lab_5_3): Make valuep a bfd_vma *.
874 2005-07-18 Nick Clifton <nickc@redhat.com>
876 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
878 (f-lab32-jmp-s): Fix insertion sequence.
879 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
880 (Dsp-40-s8): Make parameter be signed.
881 (Dsp-40-s16): Likewise.
882 (Dsp-48-s8): Likewise.
883 (Dsp-48-s16): Likewise.
884 (Imm-13-u3): Likewise. (Despite its name!)
885 (BitBase16-16-s8): Make the parameter be unsigned.
886 (BitBase16-8-u11-S): Likewise.
887 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
888 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
891 * m32c.opc: Fix formatting.
892 Use safe-ctype.h instead of ctype.h
893 Move duplicated code sequences into a macro.
894 Fix compile time warnings about signedness mismatches.
896 (parse_lab_5_3): New parser function.
898 2005-07-16 Jim Blandy <jimb@redhat.com>
900 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
901 to represent isa sets.
903 2005-07-15 Jim Blandy <jimb@redhat.com>
905 * m32c.cpu, m32c.opc: Fix copyright.
907 2005-07-14 Jim Blandy <jimb@redhat.com>
909 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
911 2005-07-14 Alan Modra <amodra@bigpond.net.au>
913 * ms1.opc (print_dollarhex): Correct format string.
915 2005-07-06 Alan Modra <amodra@bigpond.net.au>
917 * iq2000.cpu: Include from binutils cpu dir.
919 2005-07-05 Nick Clifton <nickc@redhat.com>
921 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
922 unsigned in order to avoid compile time warnings about sign
925 * ms1.opc (parse_*): Likewise.
926 (parse_imm16): Use a "void *" as it is passed both signed and
929 2005-07-01 Nick Clifton <nickc@redhat.com>
931 * frv.opc: Update to ISO C90 function declaration style.
932 * iq2000.opc: Likewise.
933 * m32r.opc: Likewise.
936 2005-06-15 Dave Brolley <brolley@redhat.com>
938 Contributed by Red Hat.
939 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
940 * ms1.opc: New file. Written by Stan Cox.
942 2005-05-10 Nick Clifton <nickc@redhat.com>
944 * Update the address and phone number of the FSF organization in
945 the GPL notices in the following files:
946 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
947 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
948 sh64-media.cpu, simplify.inc
950 2005-02-24 Alan Modra <amodra@bigpond.net.au>
952 * frv.opc (parse_A): Warning fix.
954 2005-02-23 Nick Clifton <nickc@redhat.com>
956 * frv.opc: Fixed compile time warnings about differing signed'ness
957 of pointers passed to functions.
958 * m32r.opc: Likewise.
960 2005-02-11 Nick Clifton <nickc@redhat.com>
962 * iq2000.opc (parse_jtargq10): Change type of valuep argument to
963 'bfd_vma *' in order avoid compile time warning message.
965 2005-01-28 Hans-Peter Nilsson <hp@axis.com>
967 * cris.cpu (mstep): Add missing insn.
969 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
971 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
972 * frv.cpu: Add support for TLS annotations in loads and calll.
973 * frv.opc (parse_symbolic_address): New.
974 (parse_ldd_annotation): New.
975 (parse_call_annotation): New.
976 (parse_ld_annotation): New.
977 (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
978 Introduce TLS relocations.
979 (parse_d12, parse_s12, parse_u12): Likewise.
980 (parse_uhi16): Likewise. Fix constant checking on 64-bit host.
981 (parse_call_label, print_at): New.
983 2004-12-21 Mikael Starvik <starvik@axis.com>
985 * cris.cpu (cris-set-mem): Correct integral write semantics.
987 2004-11-29 Hans-Peter Nilsson <hp@axis.com>
989 * cris.cpu: New file.
991 2004-11-15 Michael K. Lechner <mike.lechner@gmail.com>
993 * iq2000.cpu: Added quotes around macro arguments so that they
994 will work with newer versions of guile.
996 2004-10-27 Nick Clifton <nickc@redhat.com>
998 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
999 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
1001 * iq2000.cpu (dnop index): Rename to _index to avoid complications
1004 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
1006 * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
1008 2004-05-15 Nick Clifton <nickc@redhat.com>
1010 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
1012 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1014 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
1016 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1018 * frv.cpu (define-arch frv): Add fr450 mach.
1019 (define-mach fr450): New.
1020 (define-model fr450): New. Add profile units to every fr450 insn.
1021 (define-attr UNIT): Add MDCUTSSI.
1022 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn.
1023 (define-attr AUDIO): New boolean.
1024 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
1025 (f-LRA-null, f-TLBPR-null): New fields.
1026 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
1027 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
1028 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
1029 (LRA-null, TLBPR-null): New macros.
1030 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
1031 (load-real-address): New macro.
1032 (lrai, lrad, tlbpr): New instructions.
1033 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
1034 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
1035 (mdcutssi): Change UNIT attribute to MDCUTSSI.
1036 (media-low-clear-semantics, media-scope-limit-semantics)
1037 (media-quad-limit, media-quad-shift): New macros.
1038 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
1039 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
1040 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
1041 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
1042 (fr450_unit_mapping): New array.
1043 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
1044 for new MDCUTSSI unit.
1045 (fr450_check_insn_major_constraints): New function.
1046 (check_insn_major_constraints): Use it.
1048 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1050 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
1051 (scutss): Change unit to I0.
1052 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
1053 (mqsaths): Fix FR400-MAJOR categorization.
1054 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
1055 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
1056 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
1059 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1061 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
1062 (rstb, rsth, rst, rstd, rstq): Delete.
1063 (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
1065 2004-02-23 Nick Clifton <nickc@redhat.com>
1067 * Apply these patches from Renesas:
1069 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1071 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
1072 disassembling codes for 0x*2 addresses.
1074 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1076 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
1078 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1080 * cpu/m32r.cpu : Add new model m32r2.
1081 Add new instructions.
1082 Replace occurrances of 'Mitsubishi' with 'Renesas'.
1083 Changed PIPE attr of push from O to OS.
1084 Care for Little-endian of M32R.
1085 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
1086 Care for Little-endian of M32R.
1087 (parse_slo16): signed extension for value.
1089 2004-02-20 Andrew Cagney <cagney@redhat.com>
1091 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
1092 Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
1094 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
1095 written by Ben Elliston.
1097 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
1099 * frv.cpu (UNIT): Add IACC.
1100 (iacc-multiply-r-r): Use it.
1101 * frv.opc (fr400_unit_mapping): Add entry for IACC.
1102 (fr500_unit_mapping, fr550_unit_mapping): Likewise.
1104 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
1106 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1107 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
1108 cut&paste errors in shifting/truncating numerical operands.
1109 2003-08-08 Alexandre Oliva <aoliva@redhat.com>
1110 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1111 (parse_uslo16): Likewise.
1112 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1113 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1114 (parse_s12): Likewise.
1115 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1116 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
1117 (parse_uslo16): Likewise.
1118 (parse_uhi16): Parse gothi and gotfuncdeschi.
1119 (parse_d12): Parse got12 and gotfuncdesc12.
1120 (parse_s12): Likewise.
1122 2003-10-10 Dave Brolley <brolley@redhat.com>
1124 * frv.cpu (dnpmop): New p-macro.
1125 (GRdoublek): Use dnpmop.
1126 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
1127 (store-double-r-r): Use (.sym regtype doublek).
1128 (r-store-double): Ditto.
1129 (store-double-r-r-u): Ditto.
1130 (conditional-store-double): Ditto.
1131 (conditional-store-double-u): Ditto.
1132 (store-double-r-simm): Ditto.
1133 (fmovs): Assign to UNIT FMALL.
1135 2003-10-06 Dave Brolley <brolley@redhat.com>
1137 * frv.cpu, frv.opc: Add support for fr550.
1139 2003-09-24 Dave Brolley <brolley@redhat.com>
1141 * frv.cpu (u-commit): New modelling unit for fr500.
1142 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
1143 (commit-r): Use u-commit model for fr500.
1145 (conditional-float-binary-op): Take profiling data as an argument.
1147 (ne-float-binary-op): Ditto.
1149 2003-09-19 Michael Snyder <msnyder@redhat.com>
1151 * frv.cpu (nldqi): Delete unimplemented instruction.
1153 2003-09-12 Dave Brolley <brolley@redhat.com>
1155 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
1156 (clear-ne-flag-r): Pass insn profiling in as an argument. Call
1157 frv_ref_SI to get input register referenced for profiling.
1158 (clear-ne-flag-all): Pass insn profiling in as an argument.
1159 (clrgr,clrfr,clrga,clrfa): Add profiling information.
1161 2003-09-11 Michael Snyder <msnyder@redhat.com>
1163 * frv.cpu: Typographical corrections.
1165 2003-09-09 Dave Brolley <brolley@redhat.com>
1167 * frv.cpu (media-dual-complex): Change UNIT to FMALL.
1168 (conditional-media-dual-complex, media-quad-complex): Likewise.
1170 2003-09-04 Dave Brolley <brolley@redhat.com>
1172 * frv.cpu (register-transfer): Pass in all attributes in on argument.
1174 (conditional-register-transfer): Ditto.
1175 (cache-preload): Ditto.
1176 (floating-point-conversion): Ditto.
1177 (floating-point-neg): Ditto.
1179 (float-binary-op-s): Ditto.
1180 (conditional-float-binary-op): Ditto.
1181 (ne-float-binary-op): Ditto.
1182 (float-dual-arith): Ditto.
1183 (ne-float-dual-arith): Ditto.
1185 2003-09-03 Dave Brolley <brolley@redhat.com>
1187 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
1188 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
1190 (A): Removed operand.
1191 (A0,A1): New operands replace operand A.
1192 (mnop): Now a real insn
1193 (mclracc): Removed insn.
1194 (mclracc-0, mclracc-1): New insns replace mclracc.
1195 (all insns): Use new UNIT attributes.
1197 2003-08-21 Nick Clifton <nickc@redhat.com>
1199 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
1200 and u-media-dual-btoh with output parameter.
1201 (cmbtoh): Add profiling hack.
1203 2003-08-19 Michael Snyder <msnyder@redhat.com>
1205 * frv.cpu: Fix typo, Frintkeven -> FRintkeven
1207 2003-06-10 Doug Evans <dje@sebabeach.org>
1209 * frv.cpu: Add IDOC attribute.
1211 2003-06-06 Andrew Cagney <cagney@redhat.com>
1213 Contributed by Red Hat.
1214 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston,
1215 Stan Cox, and Frank Ch. Eigler.
1216 * iq2000.opc: New file. Written by Ben Elliston, Frank
1217 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
1218 * iq2000m.cpu: New file. Written by Jeff Johnston.
1219 * iq10.cpu: New file. Written by Jeff Johnston.
1221 2003-06-05 Nick Clifton <nickc@redhat.com>
1223 * frv.cpu (FRintieven): New operand. An even-numbered only
1224 version of the FRinti operand.
1225 (FRintjeven): Likewise for FRintj.
1226 (FRintkeven): Likewise for FRintk.
1227 (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
1228 media-quad-arith-sat-semantics, media-quad-arith-sat,
1229 conditional-media-quad-arith-sat, mdunpackh,
1230 media-quad-multiply-semantics, media-quad-multiply,
1231 conditional-media-quad-multiply, media-quad-complex-i,
1232 media-quad-multiply-acc-semantics, media-quad-multiply-acc,
1233 conditional-media-quad-multiply-acc, munpackh,
1234 media-quad-multiply-cross-acc-semantics, mdpackh,
1235 media-quad-multiply-cross-acc, mbtoh-semantics,
1236 media-quad-cross-multiply-cross-acc-semantics,
1237 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
1238 media-quad-cross-multiply-acc-semantics, cmbtoh,
1239 media-quad-cross-multiply-acc, media-quad-complex, mhtob,
1240 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
1241 cmhtob): Use new operands.
1242 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
1243 (parse_even_register): New function.
1245 2003-06-03 Nick Clifton <nickc@redhat.com>
1247 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
1248 immediate value not unsigned.
1250 2003-06-03 Andrew Cagney <cagney@redhat.com>
1252 Contributed by Red Hat.
1253 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore,
1254 and Eric Christopher.
1255 * frv.opc: New file. Written by Catherine Moore, and Dave
1257 * simplify.inc: New file. Written by Doug Evans.
1259 2003-05-02 Andrew Cagney <cagney@redhat.com>
1264 Copyright (C) 2003-2012 Free Software Foundation, Inc.
1266 Copying and distribution of this file, with or without modification,
1267 are permitted in any medium without royalty provided the copyright
1268 notice and this notice are preserved.
1274 version-control: never