1 2022-01-22 Nick Clifton <nickc@redhat.com>
3 * 2.38 release branch created.
5 2021-07-05 Alan Modra <amodra@gmail.com>
7 * mep.opc (macros): Make static and const.
8 (lookup_macro): Return and use const pointer.
9 (expand_macro): Make mac param const.
10 (expand_string): Make pmacro const.
12 2021-07-03 Nick Clifton <nickc@redhat.com>
14 * 2.37 release branch created.
16 2021-05-06 Stafford Horne <shorne@gmail.com>
19 * or1k.opc (or1k_imm16_relocs, parse_reloc): Define parse logic
20 for gotha() relocation.
22 2021-03-31 Alan Modra <amodra@gmail.com>
24 * frv.opc: Replace bfd_boolean with bool, FALSE with false, and
25 TRUE with true throughout.
27 2021-03-29 Alan Modra <amodra@gmail.com>
29 * frv.opc (frv_is_branch_major, frv_is_float_major),
30 (frv_is_media_major, frv_is_branch_insn, frv_is_float_insn),
31 (frv_is_media_insn, spr_valid): Correct prototypes.
33 2021-01-09 Nick Clifton <nickc@redhat.com>
35 * 2.36 release branch crated.
37 2020-10-05 Samanta Navarro <ferivoz@riseup.net>
39 * m32r.cpu: Fix spelling mistakes.
41 2020-09-18 David Faust <david.faust@oracle.com>
43 * bpf.cpu (insn-op-code-alu): Add SDIV and SMOD.
44 (define-alu-insn-bin, daib): Take ISAs as an argument.
45 (define-alu-instructions): Update calls to daib pmacro with
46 ISAs; add sdiv and smod.
48 2020-09-08 David Faust <david.faust@oracle.com>
50 * bpf.cpu (define-alu-instructions): Correct semantic operators
51 for div, mod to unsigned versions.
53 2020-09-01 Alan Modra <amodra@gmail.com>
55 * mep-core.cpu (f-8s8a2, f-12s4a2, f-17s16a2): Multiply signed
56 value by two rather than shifting left.
57 (f-24s5a2n): Similarly multiply signed f-24s5a2n-hi to extract.
59 2020-08-26 David Faust <david.faust@oracle.com>
61 * bpf.cpu (arch bpf): Add xbpf mach and isas.
62 (define-xbpf-isa) New pmacro.
63 (all-isas) Add xbpfle,xbpfbe.
64 (endian-isas): New pmacro.
66 (model xbpf-def): Likewise.
67 (h-gpr): Add xbpf mach.
68 (f-dstle, f-srcle, dstle, srcle): Add xbpfle isa.
69 (f-dstbe, f-srcbe, dstbe, srcbe): Add xbpfbe isa.
70 (define-alu-insn-un): Use new endian-isas pmacro.
71 (define-alu-insn-bin, define-alu-insn-mov): Likewise.
72 (define-endian-insn, define-lddw): Likewise.
73 (dlind, dxli, dxsi, dsti): Likewise.
74 (define-cond-jump-insn, define-call-insn): Likewise.
75 (define-atomic-insns): Likewise.
77 2020-07-04 Nick Clifton <nickc@redhat.com>
79 Binutils 2.35 branch created.
81 2020-06-25 David Faust <david.faust@oracle.com>
83 * bpf.cpu (f-offset16): Change type from INT to HI.
84 (dxli): Simplify memory access.
86 (define-endian-insn): Update c-call in semantics.
90 2020-06-02 Jose E. Marchesi <jose.marchesi@oracle.com>
92 * bpf.cpu (define-bpf-isa): Set base-insn-bitsize to 64.
93 * bpf.opc (bpf_print_insn): Do not set endian_code here.
95 2020-06-02 Jose E. Marchesi <jose.marchesi@oracle.com>
97 * mep.opc (print_slot_insn): Pass the insn endianness to
100 2020-05-28 Jose E. Marchesi <jose.marchesi@oracle.com>
101 David Faust <david.faust@oracle.com>
103 * bpf.cpu (define-alu-insn-un): Add definitions of semantics.
104 (define-alu-insn-mov): Likewise.
106 (define-alu-instructions): Likewise.
107 (define-endian-insn): Likewise.
108 (define-lddw): Likewise.
114 (define-ldstx-insns): Likewise.
115 (define-st-insns): Likewise.
116 (define-cond-jump-insn): Likewise.
118 (define-condjump-insns): Likewise.
119 (define-call-insn): Likewise.
122 (define-atomic-insns): Likewise.
123 (sem-exchange-and-add): New macro.
124 * bpf.cpu ("brkpt"): New instruction.
125 (bpfbf): Set word-bitsize to 32 and insn-endian big.
126 (h-gpr): Prefer r0 to `a' and r6 to `ctx'.
127 (h-pc): Expand definition.
128 * bpf.opc (bpf_print_insn): Set endian_code to BIG.
130 2020-05-21 Alan Modra <amodra@gmail.com>
132 * mep.opc (mep_cgen_expand_macros_and_parse_operand): Replace
133 "if (x) free (x)" with "free (x)".
135 2020-05-19 Stafford Horne <shorne@gmail.com>
138 * or1k.cpu (arch or1k): Remove or64 and or64nd machs.
139 (ORBIS-MACHS, ORFPX32-MACHS): Remove pmacros.
140 (cpu or1k64bf, mach or64, mach or64nd): Remove definitions.
141 * or1kcommon.cpu (h-fdr): Remove hardware.
142 * or1korfpx.cpu (rDDF, rADF, rBDF): Remove operand definitions.
143 (float-regreg-insn): Remove lf- mnemonic -d instruction pattern.
144 (float-setflag-insn-base): Remove lf-sf mnemonic -d pattern.
145 (float-cust-insn): Remove "lf-cust" cust-num "-d" pattern.
146 (lf-rem-d, lf-itof-d, lf-ftoi-d, lf-madd-d): Remove.
148 2020-02-16 David Faust <david.faust@oracle.com>
150 * bpf.cpu (define-cond-jump-insn): Renamed from djci.
151 (dcji) New version with support for JMP32
153 2020-02-03 Alan Modra <amodra@gmail.com>
155 * m32c.cpu (f-dsp-64-s16): Mask before shifting signed value.
157 2020-02-01 Alan Modra <amodra@gmail.com>
159 * frv.cpu (f-u12): Multiply rather than left shift signed values.
160 (f-label16, f-label24): Likewise.
162 2020-01-30 Alan Modra <amodra@gmail.com>
164 * m32c.cpu (f-src32-rn-unprefixed-QI): Shift before inverting.
165 (f-src32-rn-prefixed-QI, f-dst32-rn-unprefixed-QI): Likewise.
166 (f-dst32-rn-prefixed-QI): Likewise.
167 (f-dsp-32-s32): Mask before shifting left.
168 (f-dsp-48-u32, f-dsp-48-s32): Likewise.
169 (f-bitbase32-16-s11-unprefixed): Multiply signed field rather than
171 (f-bitbase32-24-s11-prefixed, f-bitbase32-24-s19-prefixed): Likewise.
172 (h-gr-SI): Mask before shifting.
174 2020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
176 * bpf.cpu (define-alu-insn-un): The unary BPF instructions
177 (neg and neg32) use OP_SRC_K even if they operate only in
180 2020-01-18 Nick Clifton <nickc@redhat.com>
182 Binutils 2.34 branch created.
184 2020-01-13 Alan Modra <amodra@gmail.com>
186 * fr30.cpu (f-disp9, f-disp10, f-s10, f-rel9, f-rel12): Don't
187 left shift signed values.
189 2020-01-06 Alan Modra <amodra@gmail.com>
191 * m32c.cpu (f-dsp-8-u16, f-dsp-8-s16): Rearrange to mask any sign
192 bits before shifting rather than masking after shifting.
193 (f-dsp-16-u16, f-dsp-16-s16, f-dsp-32-u16, f-dsp-32-s16): Likewise.
194 (f-dsp-40-u16, f-dsp-40-s16, f-dsp-48-u16, f-dsp-48-s16): Likewise.
195 (f-dsp-64-u16, f-dsp-8-s24): Likewise.
196 (f-bitbase32-16-s19-unprefixed): Avoid signed left shift.
198 2020-01-04 Alan Modra <amodra@gmail.com>
200 * m32r.cpu (f-disp8): Avoid left shift of negative values.
201 (f-disp16, f-disp24): Likewise.
203 2019-12-23 Alan Modra <amodra@gmail.com>
205 * iq2000.cpu (f-offset): Avoid left shift of negative values.
207 2019-12-20 Alan Modra <amodra@gmail.com>
209 * or1korbis.cpu (f-disp26, f-disp21): Don't left shift negative values.
211 2019-12-17 Alan Modra <amodra@gmail.com>
213 * bpf.cpu (f-imm64): Avoid signed overflow.
215 2019-12-16 Alan Modra <amodra@gmail.com>
217 * xstormy16.cpu (f-rel12a): Avoid signed overflow.
219 2019-12-11 Alan Modra <amodra@gmail.com>
221 * epiphany.cpu (f-sdisp11): Don't sign extend with shifts.
222 * lm32.cpu (f-branch, f-vall): Likewise.
223 * m32.cpu (f-lab-8-16): Likewise.
225 2019-12-11 Alan Modra <amodra@gmail.com>
227 * epiphany.cpu (f-simm8, f-simm24): Use multiply rather than
228 shift left to avoid UB on left shift of negative values.
230 2019-11-20 Jose E. Marchesi <jose.marchesi@oracle.com>
232 * bpf.cpu: Fix comment describing the 128-bit instruction format.
234 2019-09-09 Phil Blundell <pb@pbcl.net>
236 binutils 2.33 branch created.
238 2019-07-19 Jose E. Marchesi <jose.marchesi@oracle.com>
240 * bpf.cpu (h-gpr): when disassembling, use %r0 and %r6 instead of
243 2019-07-15 Jose E. Marchesi <jose.marchesi@oracle.com>
245 * bpf.cpu (dlabs): New pmacro.
248 2019-07-14 Jose E. Marchesi <jose.marchesi@oracle.com>
250 * bpf.cpu (dlsi): ldabs and ldind instructions do not take an
251 explicit 'dst' argument.
253 2019-06-13 Stafford Horne <shorne@gmail.com>
255 * or1korfpx.cpu (float-setflag-insn-base): Add 'sf' to symbol.
257 2019-06-13 Stafford Horne <shorne@gmail.com>
259 * or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a
260 (l-adrp): Improve comment.
262 2019-06-13 Stafford Horne <shorne@gmail.com>
264 * or1korfpx.cpu (insn-opcode-float-regreg): Add SFUEQ_S, SFUNE_S,
265 SFUGT_S, SFUGE_S, SFULT_S, SFULE_S, SFUN_S, SFUEQ_D, SFUNE_D, SFUGT_D,
266 SFUGE_D, SFULT_D, SFULE_D, SFUN_D opcodes.
267 (float-setflag-insn-base): New pmacro based on float-setflag-insn.
268 (float-setflag-symantics, float-setflag-unordered-cmp-symantics,
269 float-setflag-unordered-symantics): New pmacro for instruction
271 (float-setflag-insn): Update to use float-setflag-insn-base.
272 (float-setflag-unordered-insn): New pmacro for generating instructions.
274 2019-06-13 Andrey Bacherov <avbacherov@opencores.org>
275 Stafford Horne <shorne@gmail.com>
277 * or1k.cpu (ORFPX64A32-MACHS): New pmacro.
278 (ORFPX-MACHS): Removed pmacro.
279 * or1k.opc (or1k_cgen_insn_supported): New function.
280 (CGEN_VALIDATE_INSN_SUPPORTED): Define macro.
281 (parse_regpair, print_regpair): New functions.
282 * or1kcommon.cpu (h-spr, spr-shift, spr-address, h-gpr): Reorder
284 (h-fdr): Update comment to indicate or64.
285 (reg-pair-reg-lo, reg-pair-reg-hi): New pmacros for register pairs.
286 (h-fd32r): New hardware for 64-bit fpu registers.
287 (h-i64r): New hardware for 64-bit int registers.
288 * or1korbis.cpu (f-resv-8-1): New field.
289 * or1korfpx.cpu (rDSF, rASF, rBSF): Update attribute to ORFPX32-MACHS.
290 (rDDF, rADF, rBDF): Update operand comment to indicate or64.
291 (f-rdoff-10-1, f-raoff-9-1, f-rboff-8-1): New fields.
292 (h-roff1): New hardware.
293 (double-field-and-ops mnemonic): New pmacro to generate operations
294 rDD32F, rAD32F, rBD32F, rDDI and rADI.
295 (float-regreg-insn): Update single precision generator to MACH
296 ORFPX32-MACHS. Add generator for or32 64-bit instructions.
297 (float-setflag-insn): Update single precision generator to MACH
298 ORFPX32-MACHS. Fix double instructions from single to double
299 precision. Add generator for or32 64-bit instructions.
300 (float-cust-insn cust-num): Update single precision generator to MACH
301 ORFPX32-MACHS. Add generator for or32 64-bit instructions.
302 (lf-rem-s, lf-itof-s, lf-ftoi-s, lf-madd-s): Update MACH to
304 (lf-rem-d): Fix operation from mod to rem.
305 (lf-rem-d32, lf-itof-d32, lf-ftoi-d32, lf-madd-d32): New instruction.
306 (lf-itof-d): Fix operands from single to double.
307 (lf-ftoi-d): Update operand mode from DI to WI.
309 2019-05-23 Jose E. Marchesi <jose.marchesi@oracle.com>
314 2018-06-24 Nick Clifton <nickc@redhat.com>
318 2018-10-05 Richard Henderson <rth@twiddle.net>
319 Stafford Horne <shorne@gmail.com>
321 * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
322 (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
323 (l-mul): Fix overflow support and indentation.
324 (l-mulu): Fix overflow support and indentation.
325 (l-muld, l-muldu, l-msbu, l-macu): New instructions.
326 (l-div); Remove incorrect carry behavior.
327 (l-divu): Fix carry and overflow behavior.
328 (l-mac): Add overflow support.
329 (l-msb, l-msbu): Add carry and overflow support.
331 2018-10-05 Richard Henderson <rth@twiddle.net>
333 * or1k.opc (parse_disp26): Add support for plta() relocations.
334 (parse_disp21): New function.
335 (or1k_rclass): New enum.
336 (or1k_rtype): New enum.
337 (or1k_imm16_relocs): Define new PO and SPO relocation mappings.
338 (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
339 (parse_imm16): Add support for the new 21bit and 13bit relocations.
340 * or1korbis.cpu (f-disp26): Don't assume SI.
341 (f-disp21): New pc-relative 21-bit 13 shifted to right.
342 (insn-opcode): Add ADRP.
343 (l-adrp): New instruction.
345 2018-10-05 Richard Henderson <rth@twiddle.net>
347 * or1k.opc: Add RTYPE_ enum.
348 (INVALID_STORE_RELOC): New string.
349 (or1k_imm16_relocs): New array array.
350 (parse_reloc): New static function that just does the parsing.
351 (parse_imm16): New static function for generic parsing.
352 (parse_simm16): Change to just call parse_imm16.
353 (parse_simm16_split): New function.
354 (parse_uimm16): Change to call parse_imm16.
355 (parse_uimm16_split): New function.
356 * or1korbis.cpu (simm16-split): Change to use new simm16_split.
357 (uimm16-split): Change to use new uimm16_split.
359 2018-07-24 Alan Modra <amodra@gmail.com>
362 * or1kcommon.cpu (spr-reg-indices): Fix description typo.
364 2018-05-09 Sebastian Rasmussen <sebras@gmail.com>
366 * or1kcommon.cpu (spr-reg-info): Typo fix.
368 2018-03-03 Alan Modra <amodra@gmail.com>
370 * frv.opc: Include opintl.h.
371 (add_next_to_vliw): Use opcodes_error_handler to print error.
372 Standardize error message.
373 (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
375 2018-01-13 Nick Clifton <nickc@redhat.com>
379 2017-03-15 Stafford Horne <shorne@gmail.com>
381 * or1kcommon.cpu: Add pc set semantics to also update ppc.
383 2016-10-06 Alan Modra <amodra@gmail.com>
385 * mep.opc (expand_string): Add fall through comment.
387 2016-03-03 Alan Modra <amodra@gmail.com>
389 * fr30.cpu (f-m4): Replace bogus comment with a better guess
390 at what is really going on.
392 2016-03-02 Alan Modra <amodra@gmail.com>
394 * fr30.cpu (f-m4): Replace -1 << 4 with -16.
396 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
398 * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
399 a constant to better align disassembler output.
401 2014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
403 * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
405 2014-06-12 Alan Modra <amodra@gmail.com>
407 * or1k.opc: Whitespace fixes.
409 2014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
411 * or1korbis.cpu (h-atomic-reserve): New hardware.
412 (h-atomic-address): Likewise.
413 (insn-opcode): Add opcodes for LWA and SWA.
414 (atomic-reserve): New operand.
415 (atomic-address): Likewise.
416 (l-lwa, l-swa): New instructions.
417 (l-lbs): Fix typo in comment.
418 (store-insn): Clear atomic reserve on store to atomic-address.
419 Fix register names in fmt field.
421 2014-04-22 Christian Svensson <blue@cmd.nu>
423 * openrisc.cpu: Delete.
424 * openrisc.opc: Delete.
425 * or1k.cpu: New file.
426 * or1k.opc: New file.
427 * or1kcommon.cpu: New file.
428 * or1korbis.cpu: New file.
429 * or1korfpx.cpu: New file.
431 2013-12-07 Mike Frysinger <vapier@gentoo.org>
433 * epiphany.opc: Remove +x file mode.
435 2013-03-08 Yann Sionneau <yann.sionneau@gmail.com>
438 * lm32.cpu (Control and status registers): Add CFG2, PSW,
439 TLBVADDR, TLBPADDR and TLBBADVADDR.
441 2012-11-30 Oleg Raikhman <oleg@adapteva.com>
442 Joern Rennecke <joern.rennecke@embecosm.com>
444 * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
445 (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
446 (testset-insn): Add NO_DIS attribute to t.l.
447 (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
448 (move-insns): Add NO-DIS attribute to cmov.l.
449 (op-mmr-movts): Add NO-DIS attribute to movts.l.
450 (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
451 (op-rrr): Add NO-DIS attribute to .l.
452 (shift-rrr): Add NO-DIS attribute to .l.
453 (op-shift-rri): Add NO-DIS attribute to i32.l.
454 (bitrl, movtl): Add NO-DIS attribute.
455 (op-iextrrr): Add NO-DIS attribute to .l
456 (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
457 (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
459 2012-02-27 Alan Modra <amodra@gmail.com>
461 * mt.opc (print_dollarhex): Trim values to 32 bits.
463 2011-12-15 Nick Clifton <nickc@redhat.com>
465 * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
468 2011-10-26 Joern Rennecke <joern.rennecke@embecosm.com>
470 * epiphany.opc (parse_branch_addr): Fix type of valuep.
471 Cast value before printing it as a long.
472 (parse_postindex): Fix type of valuep.
474 2011-10-25 Joern Rennecke <joern.rennecke@embecosm.com>
476 * cpu/epiphany.cpu: New file.
477 * cpu/epiphany.opc: New file.
479 2011-08-22 Nick Clifton <nickc@redhat.com>
481 * fr30.cpu: Newly contributed file.
482 * fr30.opc: Likewise.
483 * ip2k.cpu: Likewise.
484 * ip2k.opc: Likewise.
485 * mep-avc.cpu: Likewise.
486 * mep-avc2.cpu: Likewise.
487 * mep-c5.cpu: Likewise.
488 * mep-core.cpu: Likewise.
489 * mep-default.cpu: Likewise.
490 * mep-ext-cop.cpu: Likewise.
491 * mep-fmax.cpu: Likewise.
492 * mep-h1.cpu: Likewise.
493 * mep-ivc2.cpu: Likewise.
494 * mep-rhcop.cpu: Likewise.
495 * mep-sample-ucidsp.cpu: Likewise.
498 * openrisc.cpu: Likewise.
499 * openrisc.opc: Likewise.
500 * xstormy16.cpu: Likewise.
501 * xstormy16.opc: Likewise.
503 2010-10-08 Pierre Muller <muller@ics.u-strasbg.fr>
505 * frv.opc: #undef DEBUG.
507 2010-07-03 DJ Delorie <dj@delorie.com>
509 * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
511 2010-02-11 Doug Evans <dje@sebabeach.org>
513 * m32r.cpu (HASH-PREFIX): Delete.
514 (duhpo, dshpo): New pmacros.
515 (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
516 (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
517 attribute, define with dshpo.
518 (uimm24): Delete HASH-PREFIX attribute.
519 * m32r.opc (CGEN_PRINT_NORMAL): Delete.
520 (print_signed_with_hash_prefix): New function.
521 (print_unsigned_with_hash_prefix): New function.
522 * xc16x.cpu (dowh): New pmacro.
523 (upof16): Define with dowh, specify print handler.
524 (qbit, qlobit, qhibit): Ditto.
526 * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
527 (print_with_dot_prefix): New functions.
528 (print_with_pof_prefix, print_with_pag_prefix): New functions.
530 2010-01-24 Doug Evans <dje@sebabeach.org>
532 * frv.cpu (floating-point-conversion): Update call to fp conv op.
533 (floating-point-dual-conversion, ne-floating-point-dual-conversion,
534 conditional-floating-point-conversion, ne-floating-point-conversion,
535 float-parallel-mul-add-double-semantics): Ditto.
537 2010-01-05 Doug Evans <dje@sebabeach.org>
539 * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
540 (f-dsp-40-u20, f-dsp-40-u24): Ditto.
542 2010-01-02 Doug Evans <dje@sebabeach.org>
544 * m32c.opc (parse_signed16): Fix typo.
546 2009-12-11 Nick Clifton <nickc@redhat.com>
548 * frv.opc: Fix shadowed variable warnings.
549 * m32c.opc: Fix shadowed variable warnings.
551 2009-11-14 Doug Evans <dje@sebabeach.org>
553 Must use VOID expression in VOID context.
554 * xc16x.cpu (mov4): Fix mode of `sequence'.
555 (mov9, mov10): Ditto.
556 (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
557 (callr, callseg, calls, trap, rets, reti): Ditto.
558 (jb, jbc, jnb, jnbs): Fix mode of `if'. Comment out no-op `sll'.
559 (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
560 (exts, exts1, extsr, extsr1, prior): Ditto.
562 2009-10-23 Doug Evans <dje@sebabeach.org>
564 * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
565 cgen-ops.h -> cgen/basic-ops.h.
567 2009-09-25 Alan Modra <amodra@bigpond.net.au>
569 * m32r.cpu (stb-plus): Typo fix.
571 2009-09-23 Doug Evans <dje@sebabeach.org>
573 * m32r.cpu (sth-plus): Fix address mode and calculation.
575 (clrpsw): Fix mask calculation.
576 (bset, bclr, btst): Make mode in bit calculation match expression.
578 * xc16x.cpu (rtl-version): Set to 0.8.
579 (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
580 make uppercase. Remove unnecessary name-prefix spec.
581 (grb-names, conditioncode-names, extconditioncode-names): Ditto.
582 (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
583 (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
584 (h-cr): New hardware.
585 (muls): Comment out parts that won't compile, add fixme.
586 (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
587 (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
588 (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
590 2009-07-16 Doug Evans <dje@sebabeach.org>
592 * cpu/simplify.inc (*): One line doc strings don't need \n.
593 (df): Invoke define-full-ifield instead of claiming it's an alias.
595 (dnop): Mark as deprecated.
597 2009-06-22 Alan Modra <amodra@bigpond.net.au>
599 * m32c.opc (parse_lab_5_3): Use correct enum.
601 2009-01-07 Hans-Peter Nilsson <hp@axis.com>
603 * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
604 (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
605 (media-arith-sat-semantics): Explicitly sign- or zero-extend
606 arguments of "operation" to DI using "mode" and the new pmacros.
608 2009-01-03 Hans-Peter Nilsson <hp@axis.com>
610 * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
613 2008-12-23 Jon Beniston <jon@beniston.com>
615 * lm32.cpu: New file.
616 * lm32.opc: New file.
618 2008-01-29 Alan Modra <amodra@bigpond.net.au>
620 * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
623 2007-10-22 Hans-Peter Nilsson <hp@axis.com>
625 * cris.cpu (movs, movu): Use result of extension operation when
628 2007-07-04 Nick Clifton <nickc@redhat.com>
630 * cris.cpu: Update copyright notice to refer to GPLv3.
631 * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
632 m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
633 sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
635 * iq2000.cpu: Fix copyright notice to refer to FSF.
637 2007-04-30 Mark Salter <msalter@sadr.localdomain>
639 * frv.cpu (spr-names): Support new coprocessor SPR registers.
641 2007-04-20 Nick Clifton <nickc@redhat.com>
643 * xc16x.cpu: Restore after accidentally overwriting this file with
646 2007-03-29 DJ Delorie <dj@redhat.com>
648 * m32c.cpu (Imm-8-s4n): Fix print hook.
649 (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
650 (arith-jnz-imm4-dst-defn): Make relaxable.
651 (arith-jnz16-imm4-dst-defn): Fix encodings.
653 2007-03-20 DJ Delorie <dj@redhat.com>
655 * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
657 (src16-16-20-An-relative-*): New.
658 (dst16-*-20-An-relative-*): New.
659 (dst16-16-16sa-*): New
660 (dst16-16-16ar-*): New
661 (dst32-16-16sa-Unprefixed-*): New
662 (jsri): Fix operands.
663 (setzx): Fix encoding.
665 2007-03-08 Alan Modra <amodra@bigpond.net.au>
667 * m32r.opc: Formatting.
669 2006-05-22 Nick Clifton <nickc@redhat.com>
671 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
673 2006-04-10 DJ Delorie <dj@redhat.com>
675 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
676 decides if this function accepts symbolic constants or not.
677 (parse_signed_bitbase): Likewise.
678 (parse_unsigned_bitbase8): Pass the new parameter.
679 (parse_unsigned_bitbase11): Likewise.
680 (parse_unsigned_bitbase16): Likewise.
681 (parse_unsigned_bitbase19): Likewise.
682 (parse_unsigned_bitbase27): Likewise.
683 (parse_signed_bitbase8): Likewise.
684 (parse_signed_bitbase11): Likewise.
685 (parse_signed_bitbase19): Likewise.
687 2006-03-13 DJ Delorie <dj@redhat.com>
689 * m32c.cpu (Bit3-S): New.
691 * m32c.opc (parse_bit3_S): New.
693 * m32c.cpu (decimal-subtraction16-insn): Add second operand.
694 (btst): Add optional :G suffix for MACH32.
696 (pop.w:G): Add optional :G suffix for MACH16.
697 (push.b.imm): Fix syntax.
699 2006-03-10 DJ Delorie <dj@redhat.com>
701 * m32c.cpu (mul.l): New.
704 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
706 * xc16x.opc (parse_hash): Return NULL if the input was parsed or
707 an error message otherwise.
708 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
709 Fix up comments to correctly describe the functions.
711 2006-02-24 DJ Delorie <dj@redhat.com>
713 * m32c.cpu (RL_TYPE): New attribute, with macros.
714 (Lab-8-24): Add RELAX.
715 (unary-insn-defn-g, binary-arith-imm-dst-defn,
716 binary-arith-imm4-dst-defn): Add 1ADDR attribute.
717 (binary-arith-src-dst-defn): Add 2ADDR attribute.
718 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
719 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
721 (jsri16, jsri32): Add 1ADDR attribute.
722 (jsr32.w, jsr32.a): Add JUMP attribute.
724 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
725 Anil Paranjape <anilp1@kpitcummins.com>
726 Shilin Shakti <shilins@kpitcummins.com>
728 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
730 * xc16x.opc: New file containing supporting XC16C routines.
732 2006-02-10 Nick Clifton <nickc@redhat.com>
734 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
736 2006-01-06 DJ Delorie <dj@redhat.com>
738 * m32c.cpu (mov.w:q): Fix mode.
739 (push32.b.imm): Likewise, for the comment.
741 2005-12-16 Nathan Sidwell <nathan@codesourcery.com>
743 Second part of ms1 to mt renaming.
744 * mt.cpu (define-arch, define-isa): Set name to mt.
745 (define-mach): Adjust.
746 * mt.opc (CGEN_ASM_HASH): Update.
747 (mt_asm_hash, mt_cgen_insn_supported): Renamed.
748 (parse_loopsize, parse_imm16): Adjust.
750 2005-12-13 DJ Delorie <dj@redhat.com>
752 * m32c.cpu (jsri): Fix order so register names aren't treated as
754 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
755 indexwd, indexws): Fix encodings.
757 2005-12-12 Nathan Sidwell <nathan@codesourcery.com>
759 * mt.cpu: Rename from ms1.cpu.
760 * mt.opc: Rename from ms1.opc.
762 2005-12-06 Hans-Peter Nilsson <hp@axis.com>
764 * cris.cpu (simplecris-common-writable-specregs)
765 (simplecris-common-readable-specregs): Split from
766 simplecris-common-specregs. All users changed.
767 (cris-implemented-writable-specregs-v0)
768 (cris-implemented-readable-specregs-v0): Similar from
769 cris-implemented-specregs-v0.
770 (cris-implemented-writable-specregs-v3)
771 (cris-implemented-readable-specregs-v3)
772 (cris-implemented-writable-specregs-v8)
773 (cris-implemented-readable-specregs-v8)
774 (cris-implemented-writable-specregs-v10)
775 (cris-implemented-readable-specregs-v10)
776 (cris-implemented-writable-specregs-v32)
777 (cris-implemented-readable-specregs-v32): Similar.
778 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
779 insns and specializations.
781 2005-11-08 Nathan Sidwell <nathan@codesourcery.com>
784 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
786 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
787 f-cb2incr, f-rc3): New fields.
788 (LOOP): New instruction.
789 (JAL-HAZARD): New hazard.
790 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
792 (mul, muli, dbnz, iflush): Enable for ms2
793 (jal, reti): Has JAL-HAZARD.
794 (ldctxt, ldfb, stfb): Only ms1.
795 (fbcb): Only ms1,ms1-003.
796 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
797 fbcbincrs, mfbcbincrs): Enable for ms2.
798 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
799 * ms1.opc (parse_loopsize): New.
800 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
803 2005-10-28 Dave Brolley <brolley@redhat.com>
805 Contribute the following change:
806 2003-09-24 Dave Brolley <brolley@redhat.com>
808 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
809 CGEN_ATTR_VALUE_TYPE.
810 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
811 Use cgen_bitset_intersect_p.
813 2005-10-27 DJ Delorie <dj@redhat.com>
815 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
816 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
817 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
818 imm operand is needed.
819 (adjnz, sbjnz): Pass the right operands.
820 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
821 unary-insn): Add -g variants for opcodes that need to support :G.
822 (not.BW:G, push.BW:G): Call it.
823 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
824 stzx16-imm8-imm8-abs16): Fix operand typos.
825 * m32c.opc (m32c_asm_hash): Support bnCND.
826 (parse_signed4n, print_signed4n): New.
828 2005-10-26 DJ Delorie <dj@redhat.com>
830 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
831 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
832 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
834 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
835 (mov.BW:S r0,r1): Fix typo r1l->r1.
836 (tst): Allow :G suffix.
837 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
839 2005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
841 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
843 2005-10-25 DJ Delorie <dj@redhat.com>
845 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
846 making one a macro of the other.
848 2005-10-21 DJ Delorie <dj@redhat.com>
850 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
851 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
852 indexld, indexls): .w variants have `1' bit.
853 (rot32.b): QI, not SI.
854 (rot32.w): HI, not SI.
855 (xchg16): HI for .w variant.
857 2005-10-19 Nick Clifton <nickc@redhat.com>
859 * m32r.opc (parse_slo16): Fix bad application of previous patch.
861 2005-10-18 Andreas Schwab <schwab@suse.de>
863 * m32r.opc (parse_slo16): Better version of previous patch.
865 2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
867 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
870 2005-07-25 DJ Delorie <dj@redhat.com>
872 * m32c.opc (parse_unsigned8): Add %dsp8().
873 (parse_signed8): Add %hi8().
874 (parse_unsigned16): Add %dsp16().
875 (parse_signed16): Add %lo16() and %hi16().
876 (parse_lab_5_3): Make valuep a bfd_vma *.
878 2005-07-18 Nick Clifton <nickc@redhat.com>
880 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
882 (f-lab32-jmp-s): Fix insertion sequence.
883 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
884 (Dsp-40-s8): Make parameter be signed.
885 (Dsp-40-s16): Likewise.
886 (Dsp-48-s8): Likewise.
887 (Dsp-48-s16): Likewise.
888 (Imm-13-u3): Likewise. (Despite its name!)
889 (BitBase16-16-s8): Make the parameter be unsigned.
890 (BitBase16-8-u11-S): Likewise.
891 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
892 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
895 * m32c.opc: Fix formatting.
896 Use safe-ctype.h instead of ctype.h
897 Move duplicated code sequences into a macro.
898 Fix compile time warnings about signedness mismatches.
900 (parse_lab_5_3): New parser function.
902 2005-07-16 Jim Blandy <jimb@redhat.com>
904 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
905 to represent isa sets.
907 2005-07-15 Jim Blandy <jimb@redhat.com>
909 * m32c.cpu, m32c.opc: Fix copyright.
911 2005-07-14 Jim Blandy <jimb@redhat.com>
913 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
915 2005-07-14 Alan Modra <amodra@bigpond.net.au>
917 * ms1.opc (print_dollarhex): Correct format string.
919 2005-07-06 Alan Modra <amodra@bigpond.net.au>
921 * iq2000.cpu: Include from binutils cpu dir.
923 2005-07-05 Nick Clifton <nickc@redhat.com>
925 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
926 unsigned in order to avoid compile time warnings about sign
929 * ms1.opc (parse_*): Likewise.
930 (parse_imm16): Use a "void *" as it is passed both signed and
933 2005-07-01 Nick Clifton <nickc@redhat.com>
935 * frv.opc: Update to ISO C90 function declaration style.
936 * iq2000.opc: Likewise.
937 * m32r.opc: Likewise.
940 2005-06-15 Dave Brolley <brolley@redhat.com>
942 Contributed by Red Hat.
943 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
944 * ms1.opc: New file. Written by Stan Cox.
946 2005-05-10 Nick Clifton <nickc@redhat.com>
948 * Update the address and phone number of the FSF organization in
949 the GPL notices in the following files:
950 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
951 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
952 sh64-media.cpu, simplify.inc
954 2005-02-24 Alan Modra <amodra@bigpond.net.au>
956 * frv.opc (parse_A): Warning fix.
958 2005-02-23 Nick Clifton <nickc@redhat.com>
960 * frv.opc: Fixed compile time warnings about differing signed'ness
961 of pointers passed to functions.
962 * m32r.opc: Likewise.
964 2005-02-11 Nick Clifton <nickc@redhat.com>
966 * iq2000.opc (parse_jtargq10): Change type of valuep argument to
967 'bfd_vma *' in order avoid compile time warning message.
969 2005-01-28 Hans-Peter Nilsson <hp@axis.com>
971 * cris.cpu (mstep): Add missing insn.
973 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
975 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
976 * frv.cpu: Add support for TLS annotations in loads and calll.
977 * frv.opc (parse_symbolic_address): New.
978 (parse_ldd_annotation): New.
979 (parse_call_annotation): New.
980 (parse_ld_annotation): New.
981 (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
982 Introduce TLS relocations.
983 (parse_d12, parse_s12, parse_u12): Likewise.
984 (parse_uhi16): Likewise. Fix constant checking on 64-bit host.
985 (parse_call_label, print_at): New.
987 2004-12-21 Mikael Starvik <starvik@axis.com>
989 * cris.cpu (cris-set-mem): Correct integral write semantics.
991 2004-11-29 Hans-Peter Nilsson <hp@axis.com>
993 * cris.cpu: New file.
995 2004-11-15 Michael K. Lechner <mike.lechner@gmail.com>
997 * iq2000.cpu: Added quotes around macro arguments so that they
998 will work with newer versions of guile.
1000 2004-10-27 Nick Clifton <nickc@redhat.com>
1002 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
1003 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
1005 * iq2000.cpu (dnop index): Rename to _index to avoid complications
1008 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
1010 * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
1012 2004-05-15 Nick Clifton <nickc@redhat.com>
1014 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
1016 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1018 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
1020 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1022 * frv.cpu (define-arch frv): Add fr450 mach.
1023 (define-mach fr450): New.
1024 (define-model fr450): New. Add profile units to every fr450 insn.
1025 (define-attr UNIT): Add MDCUTSSI.
1026 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn.
1027 (define-attr AUDIO): New boolean.
1028 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
1029 (f-LRA-null, f-TLBPR-null): New fields.
1030 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
1031 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
1032 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
1033 (LRA-null, TLBPR-null): New macros.
1034 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
1035 (load-real-address): New macro.
1036 (lrai, lrad, tlbpr): New instructions.
1037 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
1038 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
1039 (mdcutssi): Change UNIT attribute to MDCUTSSI.
1040 (media-low-clear-semantics, media-scope-limit-semantics)
1041 (media-quad-limit, media-quad-shift): New macros.
1042 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
1043 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
1044 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
1045 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
1046 (fr450_unit_mapping): New array.
1047 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
1048 for new MDCUTSSI unit.
1049 (fr450_check_insn_major_constraints): New function.
1050 (check_insn_major_constraints): Use it.
1052 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1054 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
1055 (scutss): Change unit to I0.
1056 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
1057 (mqsaths): Fix FR400-MAJOR categorization.
1058 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
1059 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
1060 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
1063 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1065 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
1066 (rstb, rsth, rst, rstd, rstq): Delete.
1067 (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
1069 2004-02-23 Nick Clifton <nickc@redhat.com>
1071 * Apply these patches from Renesas:
1073 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1075 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
1076 disassembling codes for 0x*2 addresses.
1078 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1080 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
1082 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1084 * cpu/m32r.cpu : Add new model m32r2.
1085 Add new instructions.
1086 Replace occurrances of 'Mitsubishi' with 'Renesas'.
1087 Changed PIPE attr of push from O to OS.
1088 Care for Little-endian of M32R.
1089 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
1090 Care for Little-endian of M32R.
1091 (parse_slo16): signed extension for value.
1093 2004-02-20 Andrew Cagney <cagney@redhat.com>
1095 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
1096 Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
1098 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
1099 written by Ben Elliston.
1101 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
1103 * frv.cpu (UNIT): Add IACC.
1104 (iacc-multiply-r-r): Use it.
1105 * frv.opc (fr400_unit_mapping): Add entry for IACC.
1106 (fr500_unit_mapping, fr550_unit_mapping): Likewise.
1108 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
1110 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1111 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
1112 cut&paste errors in shifting/truncating numerical operands.
1113 2003-08-08 Alexandre Oliva <aoliva@redhat.com>
1114 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1115 (parse_uslo16): Likewise.
1116 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1117 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1118 (parse_s12): Likewise.
1119 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1120 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
1121 (parse_uslo16): Likewise.
1122 (parse_uhi16): Parse gothi and gotfuncdeschi.
1123 (parse_d12): Parse got12 and gotfuncdesc12.
1124 (parse_s12): Likewise.
1126 2003-10-10 Dave Brolley <brolley@redhat.com>
1128 * frv.cpu (dnpmop): New p-macro.
1129 (GRdoublek): Use dnpmop.
1130 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
1131 (store-double-r-r): Use (.sym regtype doublek).
1132 (r-store-double): Ditto.
1133 (store-double-r-r-u): Ditto.
1134 (conditional-store-double): Ditto.
1135 (conditional-store-double-u): Ditto.
1136 (store-double-r-simm): Ditto.
1137 (fmovs): Assign to UNIT FMALL.
1139 2003-10-06 Dave Brolley <brolley@redhat.com>
1141 * frv.cpu, frv.opc: Add support for fr550.
1143 2003-09-24 Dave Brolley <brolley@redhat.com>
1145 * frv.cpu (u-commit): New modelling unit for fr500.
1146 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
1147 (commit-r): Use u-commit model for fr500.
1149 (conditional-float-binary-op): Take profiling data as an argument.
1151 (ne-float-binary-op): Ditto.
1153 2003-09-19 Michael Snyder <msnyder@redhat.com>
1155 * frv.cpu (nldqi): Delete unimplemented instruction.
1157 2003-09-12 Dave Brolley <brolley@redhat.com>
1159 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
1160 (clear-ne-flag-r): Pass insn profiling in as an argument. Call
1161 frv_ref_SI to get input register referenced for profiling.
1162 (clear-ne-flag-all): Pass insn profiling in as an argument.
1163 (clrgr,clrfr,clrga,clrfa): Add profiling information.
1165 2003-09-11 Michael Snyder <msnyder@redhat.com>
1167 * frv.cpu: Typographical corrections.
1169 2003-09-09 Dave Brolley <brolley@redhat.com>
1171 * frv.cpu (media-dual-complex): Change UNIT to FMALL.
1172 (conditional-media-dual-complex, media-quad-complex): Likewise.
1174 2003-09-04 Dave Brolley <brolley@redhat.com>
1176 * frv.cpu (register-transfer): Pass in all attributes in on argument.
1178 (conditional-register-transfer): Ditto.
1179 (cache-preload): Ditto.
1180 (floating-point-conversion): Ditto.
1181 (floating-point-neg): Ditto.
1183 (float-binary-op-s): Ditto.
1184 (conditional-float-binary-op): Ditto.
1185 (ne-float-binary-op): Ditto.
1186 (float-dual-arith): Ditto.
1187 (ne-float-dual-arith): Ditto.
1189 2003-09-03 Dave Brolley <brolley@redhat.com>
1191 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
1192 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
1194 (A): Removed operand.
1195 (A0,A1): New operands replace operand A.
1196 (mnop): Now a real insn
1197 (mclracc): Removed insn.
1198 (mclracc-0, mclracc-1): New insns replace mclracc.
1199 (all insns): Use new UNIT attributes.
1201 2003-08-21 Nick Clifton <nickc@redhat.com>
1203 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
1204 and u-media-dual-btoh with output parameter.
1205 (cmbtoh): Add profiling hack.
1207 2003-08-19 Michael Snyder <msnyder@redhat.com>
1209 * frv.cpu: Fix typo, Frintkeven -> FRintkeven
1211 2003-06-10 Doug Evans <dje@sebabeach.org>
1213 * frv.cpu: Add IDOC attribute.
1215 2003-06-06 Andrew Cagney <cagney@redhat.com>
1217 Contributed by Red Hat.
1218 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston,
1219 Stan Cox, and Frank Ch. Eigler.
1220 * iq2000.opc: New file. Written by Ben Elliston, Frank
1221 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
1222 * iq2000m.cpu: New file. Written by Jeff Johnston.
1223 * iq10.cpu: New file. Written by Jeff Johnston.
1225 2003-06-05 Nick Clifton <nickc@redhat.com>
1227 * frv.cpu (FRintieven): New operand. An even-numbered only
1228 version of the FRinti operand.
1229 (FRintjeven): Likewise for FRintj.
1230 (FRintkeven): Likewise for FRintk.
1231 (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
1232 media-quad-arith-sat-semantics, media-quad-arith-sat,
1233 conditional-media-quad-arith-sat, mdunpackh,
1234 media-quad-multiply-semantics, media-quad-multiply,
1235 conditional-media-quad-multiply, media-quad-complex-i,
1236 media-quad-multiply-acc-semantics, media-quad-multiply-acc,
1237 conditional-media-quad-multiply-acc, munpackh,
1238 media-quad-multiply-cross-acc-semantics, mdpackh,
1239 media-quad-multiply-cross-acc, mbtoh-semantics,
1240 media-quad-cross-multiply-cross-acc-semantics,
1241 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
1242 media-quad-cross-multiply-acc-semantics, cmbtoh,
1243 media-quad-cross-multiply-acc, media-quad-complex, mhtob,
1244 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
1245 cmhtob): Use new operands.
1246 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
1247 (parse_even_register): New function.
1249 2003-06-03 Nick Clifton <nickc@redhat.com>
1251 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
1252 immediate value not unsigned.
1254 2003-06-03 Andrew Cagney <cagney@redhat.com>
1256 Contributed by Red Hat.
1257 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore,
1258 and Eric Christopher.
1259 * frv.opc: New file. Written by Catherine Moore, and Dave
1261 * simplify.inc: New file. Written by Doug Evans.
1263 2003-05-02 Andrew Cagney <cagney@redhat.com>
1268 Copyright (C) 2003-2012 Free Software Foundation, Inc.
1270 Copying and distribution of this file, with or without modification,
1271 are permitted in any medium without royalty provided the copyright
1272 notice and this notice are preserved.
1278 version-control: never