cpu/ChangeLog

   1 2020-08-26  David Faust  <david.faust@oracle.com>
   2
   3         * bpf.cpu (arch bpf): Add xbpf mach and isas.
   4         (define-xbpf-isa) New pmacro.
   5         (all-isas) Add xbpfle,xbpfbe.
   6         (endian-isas): New pmacro.
   7         (mach xbpf): New.
   8         (model xbpf-def): Likewise.
   9         (h-gpr): Add xbpf mach.
  10         (f-dstle, f-srcle, dstle, srcle): Add xbpfle isa.
  11         (f-dstbe, f-srcbe, dstbe, srcbe): Add xbpfbe isa.
  12         (define-alu-insn-un): Use new endian-isas pmacro.
  13         (define-alu-insn-bin, define-alu-insn-mov): Likewise.
  14         (define-endian-insn, define-lddw): Likewise.
  15         (dlind, dxli, dxsi, dsti): Likewise.
  16         (define-cond-jump-insn, define-call-insn): Likewise.
  17         (define-atomic-insns): Likewise.
  18
  19 2020-07-04  Nick Clifton  <nickc@redhat.com>
  20
  21         Binutils 2.35 branch created.
  22
  23 2020-06-25 David Faust  <david.faust@oracle.com>
  24
  25         * bpf.cpu (f-offset16): Change type from INT to HI.
  26         (dxli): Simplify memory access.
  27         (dxsi): Likewise.
  28         (define-endian-insn): Update c-call in semantics.
  29         (dlabs) Likewise.
  30         (dlind) Likewise.
  31
  32 2020-06-02  Jose E. Marchesi  <jose.marchesi@oracle.com>
  33
  34         * bpf.cpu (define-bpf-isa): Set base-insn-bitsize to 64.
  35         * bpf.opc (bpf_print_insn): Do not set endian_code here.
  36
  37 2020-06-02  Jose E. Marchesi  <jose.marchesi@oracle.com>
  38
  39         * mep.opc (print_slot_insn): Pass the insn endianness to
  40         cgen_get_insn_value.
  41
  42 2020-05-28  Jose E. Marchesi  <jose.marchesi@oracle.com>
  43             David Faust <david.faust@oracle.com>
  44
  45         * bpf.cpu (define-alu-insn-un): Add definitions of semantics.
  46         (define-alu-insn-mov): Likewise.
  47         (daib): Likewise.
  48         (define-alu-instructions): Likewise.
  49         (define-endian-insn): Likewise.
  50         (define-lddw): Likewise.
  51         (dlabs): Likewise.
  52         (dlind): Likewise.
  53         (dxli): Likewise.
  54         (dxsi): Likewise.
  55         (dsti): Likewise.
  56         (define-ldstx-insns): Likewise.
  57         (define-st-insns): Likewise.
  58         (define-cond-jump-insn): Likewise.
  59         (dcji): Likewise.
  60         (define-condjump-insns): Likewise.
  61         (define-call-insn): Likewise.
  62         (ja): Likewise.
  63         ("exit"): Likewise.
  64         (define-atomic-insns): Likewise.
  65         (sem-exchange-and-add): New macro.
  66         * bpf.cpu ("brkpt"): New instruction.
  67         (bpfbf): Set word-bitsize to 32 and insn-endian big.
  68         (h-gpr): Prefer r0 to `a' and r6 to `ctx'.
  69         (h-pc): Expand definition.
  70         * bpf.opc (bpf_print_insn): Set endian_code to BIG.
  71
  72 2020-05-21  Alan Modra  <amodra@gmail.com>
  73
  74         * mep.opc (mep_cgen_expand_macros_and_parse_operand): Replace
  75         "if (x) free (x)" with "free (x)".
  76
  77 2020-05-19  Stafford Horne  <shorne@gmail.com>
  78
  79         PR 25184
  80         * or1k.cpu (arch or1k): Remove or64 and or64nd machs.
  81         (ORBIS-MACHS, ORFPX32-MACHS): Remove pmacros.
  82         (cpu or1k64bf, mach or64, mach or64nd): Remove definitions.
  83         * or1kcommon.cpu (h-fdr): Remove hardware.
  84         * or1korfpx.cpu (rDDF, rADF, rBDF): Remove operand definitions.
  85         (float-regreg-insn): Remove lf- mnemonic -d instruction pattern.
  86         (float-setflag-insn-base): Remove lf-sf mnemonic -d pattern.
  87         (float-cust-insn): Remove "lf-cust" cust-num "-d" pattern.
  88         (lf-rem-d, lf-itof-d, lf-ftoi-d, lf-madd-d): Remove.
  89
  90 2020-02-16  David Faust  <david.faust@oracle.com>
  91
  92         * bpf.cpu (define-cond-jump-insn): Renamed from djci.
  93         (dcji) New version with support for JMP32
  94
  95 2020-02-03  Alan Modra  <amodra@gmail.com>
  96
  97         * m32c.cpu (f-dsp-64-s16): Mask before shifting signed value.
  98
  99 2020-02-01  Alan Modra  <amodra@gmail.com>
 100
 101         * frv.cpu (f-u12): Multiply rather than left shift signed values.
 102         (f-label16, f-label24): Likewise.
 103
 104 2020-01-30  Alan Modra  <amodra@gmail.com>
 105
 106         * m32c.cpu (f-src32-rn-unprefixed-QI): Shift before inverting.
 107         (f-src32-rn-prefixed-QI, f-dst32-rn-unprefixed-QI): Likewise.
 108         (f-dst32-rn-prefixed-QI): Likewise.
 109         (f-dsp-32-s32): Mask before shifting left.
 110         (f-dsp-48-u32, f-dsp-48-s32): Likewise.
 111         (f-bitbase32-16-s11-unprefixed): Multiply signed field rather than
 112         shifting left.
 113         (f-bitbase32-24-s11-prefixed, f-bitbase32-24-s19-prefixed): Likewise.
 114         (h-gr-SI): Mask before shifting.
 115
 116 2020-01-30  Jose E. Marchesi  <jose.marchesi@oracle.com>
 117
 118         * bpf.cpu (define-alu-insn-un): The unary BPF instructions
 119         (neg and neg32) use OP_SRC_K even if they operate only in
 120         registers.
 121
 122 2020-01-18  Nick Clifton  <nickc@redhat.com>
 123
 124         Binutils 2.34 branch created.
 125
 126 2020-01-13  Alan Modra  <amodra@gmail.com>
 127
 128         * fr30.cpu (f-disp9, f-disp10, f-s10, f-rel9, f-rel12): Don't
 129         left shift signed values.
 130
 131 2020-01-06  Alan Modra  <amodra@gmail.com>
 132
 133         * m32c.cpu (f-dsp-8-u16, f-dsp-8-s16): Rearrange to mask any sign
 134         bits before shifting rather than masking after shifting.
 135         (f-dsp-16-u16, f-dsp-16-s16, f-dsp-32-u16, f-dsp-32-s16): Likewise.
 136         (f-dsp-40-u16, f-dsp-40-s16, f-dsp-48-u16, f-dsp-48-s16): Likewise.
 137         (f-dsp-64-u16, f-dsp-8-s24): Likewise.
 138         (f-bitbase32-16-s19-unprefixed): Avoid signed left shift.
 139
 140 2020-01-04  Alan Modra  <amodra@gmail.com>
 141
 142         * m32r.cpu (f-disp8): Avoid left shift of negative values.
 143         (f-disp16, f-disp24): Likewise.
 144
 145 2019-12-23  Alan Modra  <amodra@gmail.com>
 146
 147         * iq2000.cpu (f-offset): Avoid left shift of negative values.
 148
 149 2019-12-20  Alan Modra  <amodra@gmail.com>
 150
 151         * or1korbis.cpu (f-disp26, f-disp21): Don't left shift negative values.
 152
 153 2019-12-17  Alan Modra  <amodra@gmail.com>
 154
 155         * bpf.cpu (f-imm64): Avoid signed overflow.
 156
 157 2019-12-16  Alan Modra  <amodra@gmail.com>
 158
 159         * xstormy16.cpu (f-rel12a): Avoid signed overflow.
 160
 161 2019-12-11  Alan Modra  <amodra@gmail.com>
 162
 163         * epiphany.cpu (f-sdisp11): Don't sign extend with shifts.
 164         * lm32.cpu (f-branch, f-vall): Likewise.
 165         * m32.cpu (f-lab-8-16): Likewise.
 166
 167 2019-12-11  Alan Modra  <amodra@gmail.com>
 168
 169         * epiphany.cpu (f-simm8, f-simm24): Use multiply rather than
 170         shift left to avoid UB on left shift of negative values.
 171
 172 2019-11-20  Jose E. Marchesi  <jose.marchesi@oracle.com>
 173
 174         * bpf.cpu: Fix comment describing the 128-bit instruction format.
 175
 176 2019-09-09  Phil Blundell  <pb@pbcl.net>
 177
 178         binutils 2.33 branch created.
 179
 180 2019-07-19  Jose E. Marchesi  <jose.marchesi@oracle.com>
 181
 182         * bpf.cpu (h-gpr): when disassembling, use %r0 and %r6 instead of
 183         %a and %ctx.
 184
 185 2019-07-15  Jose E. Marchesi  <jose.marchesi@oracle.com>
 186
 187         * bpf.cpu (dlabs): New pmacro.
 188         (dlind): Likewise.
 189
 190 2019-07-14  Jose E. Marchesi  <jose.marchesi@oracle.com>
 191
 192         * bpf.cpu (dlsi): ldabs and ldind instructions do not take an
 193         explicit 'dst' argument.
 194
 195 2019-06-13  Stafford Horne  <shorne@gmail.com>
 196
 197         * or1korfpx.cpu (float-setflag-insn-base): Add 'sf' to symbol.
 198
 199 2019-06-13  Stafford Horne  <shorne@gmail.com>
 200
 201         * or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a
 202         (l-adrp): Improve comment.
 203
 204 2019-06-13  Stafford Horne  <shorne@gmail.com>
 205
 206         * or1korfpx.cpu (insn-opcode-float-regreg): Add SFUEQ_S, SFUNE_S,
 207         SFUGT_S, SFUGE_S, SFULT_S, SFULE_S, SFUN_S, SFUEQ_D, SFUNE_D, SFUGT_D,
 208         SFUGE_D, SFULT_D, SFULE_D, SFUN_D opcodes.
 209         (float-setflag-insn-base): New pmacro based on float-setflag-insn.
 210         (float-setflag-symantics, float-setflag-unordered-cmp-symantics,
 211         float-setflag-unordered-symantics): New pmacro for instruction
 212         symantics.
 213         (float-setflag-insn): Update to use float-setflag-insn-base.
 214         (float-setflag-unordered-insn): New pmacro for generating instructions.
 215
 216 2019-06-13  Andrey Bacherov  <avbacherov@opencores.org>
 217             Stafford Horne  <shorne@gmail.com>
 218
 219         * or1k.cpu (ORFPX64A32-MACHS): New pmacro.
 220         (ORFPX-MACHS): Removed pmacro.
 221         * or1k.opc (or1k_cgen_insn_supported): New function.
 222         (CGEN_VALIDATE_INSN_SUPPORTED): Define macro.
 223         (parse_regpair, print_regpair): New functions.
 224         * or1kcommon.cpu (h-spr, spr-shift, spr-address, h-gpr): Reorder
 225         and add comments.
 226         (h-fdr): Update comment to indicate or64.
 227         (reg-pair-reg-lo, reg-pair-reg-hi): New pmacros for register pairs.
 228         (h-fd32r): New hardware for 64-bit fpu registers.
 229         (h-i64r): New hardware for 64-bit int registers.
 230         * or1korbis.cpu (f-resv-8-1): New field.
 231         * or1korfpx.cpu (rDSF, rASF, rBSF): Update attribute to ORFPX32-MACHS.
 232         (rDDF, rADF, rBDF): Update operand comment to indicate or64.
 233         (f-rdoff-10-1, f-raoff-9-1, f-rboff-8-1): New fields.
 234         (h-roff1): New hardware.
 235         (double-field-and-ops mnemonic): New pmacro to generate operations
 236         rDD32F, rAD32F, rBD32F, rDDI and rADI.
 237         (float-regreg-insn): Update single precision generator to MACH
 238         ORFPX32-MACHS.  Add generator for or32 64-bit instructions.
 239         (float-setflag-insn): Update single precision generator to MACH
 240         ORFPX32-MACHS.  Fix double instructions from single to double
 241         precision.  Add generator for or32 64-bit instructions.
 242         (float-cust-insn cust-num): Update single precision generator to MACH
 243         ORFPX32-MACHS.  Add generator for or32 64-bit instructions.
 244         (lf-rem-s, lf-itof-s, lf-ftoi-s, lf-madd-s): Update MACH to
 245         ORFPX32-MACHS.
 246         (lf-rem-d): Fix operation from mod to rem.
 247         (lf-rem-d32, lf-itof-d32, lf-ftoi-d32, lf-madd-d32): New instruction.
 248         (lf-itof-d): Fix operands from single to double.
 249         (lf-ftoi-d): Update operand mode from DI to WI.
 250
 251 2019-05-23  Jose E. Marchesi  <jose.marchesi@oracle.com>
 252
 253         * bpf.cpu: New file.
 254         * bpf.opc: Likewise.
 255
 256 2018-06-24  Nick Clifton  <nickc@redhat.com>
 257
 258         2.32 branch created.
 259
 260 2018-10-05  Richard Henderson  <rth@twiddle.net>
 261             Stafford Horne  <shorne@gmail.com>
 262
 263         * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
 264         (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
 265         (l-mul): Fix overflow support and indentation.
 266         (l-mulu): Fix overflow support and indentation.
 267         (l-muld, l-muldu, l-msbu, l-macu): New instructions.
 268         (l-div); Remove incorrect carry behavior.
 269         (l-divu): Fix carry and overflow behavior.
 270         (l-mac): Add overflow support.
 271         (l-msb, l-msbu): Add carry and overflow support.
 272
 273 2018-10-05  Richard Henderson  <rth@twiddle.net>
 274
 275         * or1k.opc (parse_disp26): Add support for plta() relocations.
 276         (parse_disp21): New function.
 277         (or1k_rclass): New enum.
 278         (or1k_rtype): New enum.
 279         (or1k_imm16_relocs): Define new PO and SPO relocation mappings.
 280         (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
 281         (parse_imm16): Add support for the new 21bit and 13bit relocations.
 282         * or1korbis.cpu (f-disp26): Don't assume SI.
 283         (f-disp21): New pc-relative 21-bit 13 shifted to right.
 284         (insn-opcode): Add ADRP.
 285         (l-adrp): New instruction.
 286
 287 2018-10-05  Richard Henderson  <rth@twiddle.net>
 288
 289         * or1k.opc: Add RTYPE_ enum.
 290         (INVALID_STORE_RELOC): New string.
 291         (or1k_imm16_relocs): New array array.
 292         (parse_reloc): New static function that just does the parsing.
 293         (parse_imm16): New static function for generic parsing.
 294         (parse_simm16): Change to just call parse_imm16.
 295         (parse_simm16_split): New function.
 296         (parse_uimm16): Change to call parse_imm16.
 297         (parse_uimm16_split): New function.
 298         * or1korbis.cpu (simm16-split): Change to use new simm16_split.
 299         (uimm16-split): Change to use new uimm16_split.
 300
 301 2018-07-24  Alan Modra  <amodra@gmail.com>
 302
 303         PR 23430
 304         * or1kcommon.cpu (spr-reg-indices): Fix description typo.
 305
 306 2018-05-09  Sebastian Rasmussen  <sebras@gmail.com>
 307
 308         * or1kcommon.cpu (spr-reg-info): Typo fix.
 309
 310 2018-03-03  Alan Modra  <amodra@gmail.com>
 311
 312         * frv.opc: Include opintl.h.
 313         (add_next_to_vliw): Use opcodes_error_handler to print error.
 314         Standardize error message.
 315         (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
 316
 317 2018-01-13  Nick Clifton  <nickc@redhat.com>
 318
 319         2.30 branch created.
 320
 321 2017-03-15  Stafford Horne  <shorne@gmail.com>
 322
 323         * or1kcommon.cpu: Add pc set semantics to also update ppc.
 324
 325 2016-10-06  Alan Modra  <amodra@gmail.com>
 326
 327         * mep.opc (expand_string): Add fall through comment.
 328
 329 2016-03-03  Alan Modra  <amodra@gmail.com>
 330
 331         * fr30.cpu (f-m4): Replace bogus comment with a better guess
 332         at what is really going on.
 333
 334 2016-03-02  Alan Modra  <amodra@gmail.com>
 335
 336         * fr30.cpu (f-m4): Replace -1 << 4 with -16.
 337
 338 2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 339
 340         * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
 341         a constant to better align disassembler output.
 342
 343 2014-07-20  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 344
 345         * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
 346
 347 2014-06-12  Alan Modra  <amodra@gmail.com>
 348
 349         * or1k.opc: Whitespace fixes.
 350
 351 2014-05-08  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 352
 353         * or1korbis.cpu (h-atomic-reserve): New hardware.
 354         (h-atomic-address): Likewise.
 355         (insn-opcode): Add opcodes for LWA and SWA.
 356         (atomic-reserve): New operand.
 357         (atomic-address): Likewise.
 358         (l-lwa, l-swa): New instructions.
 359         (l-lbs): Fix typo in comment.
 360         (store-insn): Clear atomic reserve on store to atomic-address.
 361         Fix register names in fmt field.
 362
 363 2014-04-22  Christian Svensson  <blue@cmd.nu>
 364
 365         * openrisc.cpu: Delete.
 366         * openrisc.opc: Delete.
 367         * or1k.cpu: New file.
 368         * or1k.opc: New file.
 369         * or1kcommon.cpu: New file.
 370         * or1korbis.cpu: New file.
 371         * or1korfpx.cpu: New file.
 372
 373 2013-12-07  Mike Frysinger  <vapier@gentoo.org>
 374
 375         * epiphany.opc: Remove +x file mode.
 376
 377 2013-03-08  Yann Sionneau  <yann.sionneau@gmail.com>
 378
 379         PR binutils/15241
 380         * lm32.cpu (Control and status registers): Add CFG2, PSW,
 381         TLBVADDR, TLBPADDR and TLBBADVADDR.
 382
 383 2012-11-30  Oleg Raikhman  <oleg@adapteva.com>
 384             Joern Rennecke  <joern.rennecke@embecosm.com>
 385
 386         * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
 387         (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
 388         (testset-insn): Add NO_DIS attribute to t.l.
 389         (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
 390         (move-insns): Add NO-DIS attribute to cmov.l.
 391         (op-mmr-movts): Add NO-DIS attribute to movts.l.
 392         (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
 393         (op-rrr): Add NO-DIS attribute to .l.
 394         (shift-rrr): Add NO-DIS attribute to .l.
 395         (op-shift-rri): Add NO-DIS attribute to i32.l.
 396         (bitrl, movtl): Add NO-DIS attribute.
 397         (op-iextrrr): Add NO-DIS attribute to .l
 398         (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
 399         (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
 400
 401 2012-02-27  Alan Modra  <amodra@gmail.com>
 402
 403         * mt.opc (print_dollarhex): Trim values to 32 bits.
 404
 405 2011-12-15  Nick Clifton  <nickc@redhat.com>
 406
 407         * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
 408         hosts.
 409
 410 2011-10-26  Joern Rennecke  <joern.rennecke@embecosm.com>
 411
 412         * epiphany.opc (parse_branch_addr): Fix type of valuep.
 413         Cast value before printing it as a long.
 414         (parse_postindex): Fix type of valuep.
 415
 416 2011-10-25  Joern Rennecke  <joern.rennecke@embecosm.com>
 417
 418         * cpu/epiphany.cpu: New file.
 419         * cpu/epiphany.opc: New file.
 420
 421 2011-08-22  Nick Clifton  <nickc@redhat.com>
 422
 423         * fr30.cpu: Newly contributed file.
 424         * fr30.opc: Likewise.
 425         * ip2k.cpu: Likewise.
 426         * ip2k.opc: Likewise.
 427         * mep-avc.cpu: Likewise.
 428         * mep-avc2.cpu: Likewise.
 429         * mep-c5.cpu: Likewise.
 430         * mep-core.cpu: Likewise.
 431         * mep-default.cpu: Likewise.
 432         * mep-ext-cop.cpu: Likewise.
 433         * mep-fmax.cpu: Likewise.
 434         * mep-h1.cpu: Likewise.
 435         * mep-ivc2.cpu: Likewise.
 436         * mep-rhcop.cpu: Likewise.
 437         * mep-sample-ucidsp.cpu: Likewise.
 438         * mep.cpu: Likewise.
 439         * mep.opc: Likewise.
 440         * openrisc.cpu: Likewise.
 441         * openrisc.opc: Likewise.
 442         * xstormy16.cpu: Likewise.
 443         * xstormy16.opc: Likewise.
 444
 445 2010-10-08  Pierre Muller  <muller@ics.u-strasbg.fr>
 446
 447         * frv.opc: #undef DEBUG.
 448
 449 2010-07-03  DJ Delorie  <dj@delorie.com>
 450
 451         * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
 452
 453 2010-02-11  Doug Evans  <dje@sebabeach.org>
 454
 455         * m32r.cpu (HASH-PREFIX): Delete.
 456         (duhpo, dshpo): New pmacros.
 457         (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
 458         (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
 459         attribute, define with dshpo.
 460         (uimm24): Delete HASH-PREFIX attribute.
 461         * m32r.opc (CGEN_PRINT_NORMAL): Delete.
 462         (print_signed_with_hash_prefix): New function.
 463         (print_unsigned_with_hash_prefix): New function.
 464         * xc16x.cpu (dowh): New pmacro.
 465         (upof16): Define with dowh, specify print handler.
 466         (qbit, qlobit, qhibit): Ditto.
 467         (upag16): Ditto.
 468         * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
 469         (print_with_dot_prefix): New functions.
 470         (print_with_pof_prefix, print_with_pag_prefix): New functions.
 471
 472 2010-01-24  Doug Evans  <dje@sebabeach.org>
 473
 474         * frv.cpu (floating-point-conversion): Update call to fp conv op.
 475         (floating-point-dual-conversion, ne-floating-point-dual-conversion,
 476         conditional-floating-point-conversion, ne-floating-point-conversion,
 477         float-parallel-mul-add-double-semantics): Ditto.
 478
 479 2010-01-05  Doug Evans  <dje@sebabeach.org>
 480
 481         * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
 482         (f-dsp-40-u20, f-dsp-40-u24): Ditto.
 483
 484 2010-01-02  Doug Evans  <dje@sebabeach.org>
 485
 486         * m32c.opc (parse_signed16): Fix typo.
 487
 488 2009-12-11  Nick Clifton  <nickc@redhat.com>
 489
 490         * frv.opc: Fix shadowed variable warnings.
 491         * m32c.opc: Fix shadowed variable warnings.
 492
 493 2009-11-14  Doug Evans  <dje@sebabeach.org>
 494
 495         Must use VOID expression in VOID context.
 496         * xc16x.cpu (mov4): Fix mode of `sequence'.
 497         (mov9, mov10): Ditto.
 498         (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
 499         (callr, callseg, calls, trap, rets, reti): Ditto.
 500         (jb, jbc, jnb, jnbs): Fix mode of `if'.  Comment out no-op `sll'.
 501         (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
 502         (exts, exts1, extsr, extsr1, prior): Ditto.
 503
 504 2009-10-23  Doug Evans  <dje@sebabeach.org>
 505
 506         * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
 507         cgen-ops.h -> cgen/basic-ops.h.
 508
 509 2009-09-25  Alan Modra  <amodra@bigpond.net.au>
 510
 511         * m32r.cpu (stb-plus): Typo fix.
 512
 513 2009-09-23  Doug Evans  <dje@sebabeach.org>
 514
 515         * m32r.cpu (sth-plus): Fix address mode and calculation.
 516         (stb-plus): Ditto.
 517         (clrpsw): Fix mask calculation.
 518         (bset, bclr, btst): Make mode in bit calculation match expression.
 519
 520         * xc16x.cpu (rtl-version): Set to 0.8.
 521         (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
 522         make uppercase.  Remove unnecessary name-prefix spec.
 523         (grb-names, conditioncode-names, extconditioncode-names): Ditto.
 524         (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
 525         (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
 526         (h-cr): New hardware.
 527         (muls): Comment out parts that won't compile, add fixme.
 528         (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
 529         (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
 530         (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
 531
 532 2009-07-16  Doug Evans  <dje@sebabeach.org>
 533
 534         * cpu/simplify.inc (*): One line doc strings don't need \n.
 535         (df): Invoke define-full-ifield instead of claiming it's an alias.
 536         (dno): Define.
 537         (dnop): Mark as deprecated.
 538
 539 2009-06-22  Alan Modra  <amodra@bigpond.net.au>
 540
 541         * m32c.opc (parse_lab_5_3): Use correct enum.
 542
 543 2009-01-07  Hans-Peter Nilsson  <hp@axis.com>
 544
 545         * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
 546         (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
 547         (media-arith-sat-semantics): Explicitly sign- or zero-extend
 548         arguments of "operation" to DI using "mode" and the new pmacros.
 549
 550 2009-01-03  Hans-Peter Nilsson  <hp@axis.com>
 551
 552         * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
 553         of number 2, PID.
 554
 555 2008-12-23  Jon Beniston <jon@beniston.com>
 556
 557         * lm32.cpu: New file.
 558         * lm32.opc: New file.
 559
 560 2008-01-29  Alan Modra  <amodra@bigpond.net.au>
 561
 562         * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
 563         to source.
 564
 565 2007-10-22  Hans-Peter Nilsson  <hp@axis.com>
 566
 567         * cris.cpu (movs, movu): Use result of extension operation when
 568         updating flags.
 569
 570 2007-07-04  Nick Clifton  <nickc@redhat.com>
 571
 572         * cris.cpu: Update copyright notice to refer to GPLv3.
 573         * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
 574         m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
 575         sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
 576         xc16x.opc: Likewise.
 577         * iq2000.cpu: Fix copyright notice to refer to FSF.
 578
 579 2007-04-30  Mark Salter  <msalter@sadr.localdomain>
 580
 581         * frv.cpu (spr-names): Support new coprocessor SPR registers.
 582
 583 2007-04-20  Nick Clifton  <nickc@redhat.com>
 584
 585         * xc16x.cpu: Restore after accidentally overwriting this file with
 586         xc16x.opc.
 587
 588 2007-03-29  DJ Delorie  <dj@redhat.com>
 589
 590         * m32c.cpu (Imm-8-s4n): Fix print hook.
 591         (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
 592         (arith-jnz-imm4-dst-defn): Make relaxable.
 593         (arith-jnz16-imm4-dst-defn): Fix encodings.
 594
 595 2007-03-20  DJ Delorie  <dj@redhat.com>
 596
 597         * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
 598         mem20): New.
 599         (src16-16-20-An-relative-*): New.
 600         (dst16-*-20-An-relative-*): New.
 601         (dst16-16-16sa-*): New
 602         (dst16-16-16ar-*): New
 603         (dst32-16-16sa-Unprefixed-*): New
 604         (jsri): Fix operands.
 605         (setzx): Fix encoding.
 606
 607 2007-03-08  Alan Modra  <amodra@bigpond.net.au>
 608
 609         * m32r.opc: Formatting.
 610
 611 2006-05-22  Nick Clifton  <nickc@redhat.com>
 612
 613         * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
 614
 615 2006-04-10  DJ Delorie  <dj@redhat.com>
 616
 617         * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
 618         decides if this function accepts symbolic constants or not.
 619         (parse_signed_bitbase): Likewise.
 620         (parse_unsigned_bitbase8): Pass the new parameter.
 621         (parse_unsigned_bitbase11): Likewise.
 622         (parse_unsigned_bitbase16): Likewise.
 623         (parse_unsigned_bitbase19): Likewise.
 624         (parse_unsigned_bitbase27): Likewise.
 625         (parse_signed_bitbase8): Likewise.
 626         (parse_signed_bitbase11): Likewise.
 627         (parse_signed_bitbase19): Likewise.
 628
 629 2006-03-13  DJ Delorie  <dj@redhat.com>
 630
 631         * m32c.cpu (Bit3-S): New.
 632         (btst:s): New.
 633         * m32c.opc (parse_bit3_S): New.
 634
 635         * m32c.cpu (decimal-subtraction16-insn): Add second operand.
 636         (btst): Add optional :G suffix for MACH32.
 637         (or.b:S): New.
 638         (pop.w:G): Add optional :G suffix for MACH16.
 639         (push.b.imm): Fix syntax.
 640
 641 2006-03-10  DJ Delorie  <dj@redhat.com>
 642
 643         * m32c.cpu (mul.l): New.
 644         (mulu.l): New.
 645
 646 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
 647
 648         * xc16x.opc (parse_hash): Return NULL if the input was parsed or
 649         an error message otherwise.
 650         (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
 651         Fix up comments to correctly describe the functions.
 652
 653 2006-02-24  DJ Delorie  <dj@redhat.com>
 654
 655         * m32c.cpu (RL_TYPE): New attribute, with macros.
 656         (Lab-8-24): Add RELAX.
 657         (unary-insn-defn-g, binary-arith-imm-dst-defn,
 658         binary-arith-imm4-dst-defn): Add 1ADDR attribute.
 659         (binary-arith-src-dst-defn): Add 2ADDR attribute.
 660         (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
 661         jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
 662         attribute.
 663         (jsri16, jsri32): Add 1ADDR attribute.
 664         (jsr32.w, jsr32.a): Add JUMP attribute.
 665
 666 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 667             Anil Paranjape   <anilp1@kpitcummins.com>
 668             Shilin Shakti    <shilins@kpitcummins.com>
 669
 670         * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
 671         description.
 672         * xc16x.opc: New file containing supporting XC16C routines.
 673
 674 2006-02-10  Nick Clifton  <nickc@redhat.com>
 675
 676         * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
 677
 678 2006-01-06  DJ Delorie  <dj@redhat.com>
 679
 680         * m32c.cpu (mov.w:q): Fix mode.
 681         (push32.b.imm): Likewise, for the comment.
 682
 683 2005-12-16  Nathan Sidwell  <nathan@codesourcery.com>
 684
 685         Second part of ms1 to mt renaming.
 686         * mt.cpu (define-arch, define-isa): Set name to mt.
 687         (define-mach): Adjust.
 688         * mt.opc (CGEN_ASM_HASH): Update.
 689         (mt_asm_hash, mt_cgen_insn_supported): Renamed.
 690         (parse_loopsize, parse_imm16): Adjust.
 691
 692 2005-12-13  DJ Delorie  <dj@redhat.com>
 693
 694         * m32c.cpu (jsri): Fix order so register names aren't treated as
 695         symbols.
 696         (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
 697         indexwd, indexws): Fix encodings.
 698
 699 2005-12-12  Nathan Sidwell  <nathan@codesourcery.com>
 700
 701         * mt.cpu: Rename from ms1.cpu.
 702         * mt.opc: Rename from ms1.opc.
 703
 704 2005-12-06  Hans-Peter Nilsson  <hp@axis.com>
 705
 706         * cris.cpu (simplecris-common-writable-specregs)
 707         (simplecris-common-readable-specregs): Split from
 708         simplecris-common-specregs.  All users changed.
 709         (cris-implemented-writable-specregs-v0)
 710         (cris-implemented-readable-specregs-v0): Similar from
 711         cris-implemented-specregs-v0.
 712         (cris-implemented-writable-specregs-v3)
 713         (cris-implemented-readable-specregs-v3)
 714         (cris-implemented-writable-specregs-v8)
 715         (cris-implemented-readable-specregs-v8)
 716         (cris-implemented-writable-specregs-v10)
 717         (cris-implemented-readable-specregs-v10)
 718         (cris-implemented-writable-specregs-v32)
 719         (cris-implemented-readable-specregs-v32): Similar.
 720         (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
 721         insns and specializations.
 722
 723 2005-11-08  Nathan Sidwell  <nathan@codesourcery.com>
 724
 725         Add ms2
 726         * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
 727         model.
 728         (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
 729         f-cb2incr, f-rc3): New fields.
 730         (LOOP): New instruction.
 731         (JAL-HAZARD): New hazard.
 732         (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
 733         New operands.
 734         (mul, muli, dbnz, iflush): Enable for ms2
 735         (jal, reti): Has JAL-HAZARD.
 736         (ldctxt, ldfb, stfb): Only ms1.
 737         (fbcb): Only ms1,ms1-003.
 738         (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
 739         fbcbincrs, mfbcbincrs): Enable for ms2.
 740         (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
 741         * ms1.opc (parse_loopsize): New.
 742         (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
 743         (print_pcrel): New.
 744
 745 2005-10-28  Dave Brolley  <brolley@redhat.com>
 746
 747         Contribute the following change:
 748         2003-09-24  Dave Brolley  <brolley@redhat.com>
 749
 750         * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
 751         CGEN_ATTR_VALUE_TYPE.
 752         * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
 753         Use cgen_bitset_intersect_p.
 754
 755 2005-10-27  DJ Delorie  <dj@redhat.com>
 756
 757         * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
 758         (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
 759         arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
 760         imm operand is needed.
 761         (adjnz, sbjnz): Pass the right operands.
 762         (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
 763         unary-insn): Add -g variants for opcodes that need to support :G.
 764         (not.BW:G, push.BW:G): Call it.
 765         (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
 766         stzx16-imm8-imm8-abs16): Fix operand typos.
 767         * m32c.opc (m32c_asm_hash): Support bnCND.
 768         (parse_signed4n, print_signed4n): New.
 769
 770 2005-10-26  DJ Delorie  <dj@redhat.com>
 771
 772         * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
 773         (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
 774         mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
 775         dsp8[sp] is signed.
 776         (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
 777         (mov.BW:S r0,r1): Fix typo r1l->r1.
 778         (tst): Allow :G suffix.
 779         * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
 780
 781 2005-10-26  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 782
 783         * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
 784
 785 2005-10-25  DJ Delorie  <dj@redhat.com>
 786
 787         * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
 788         making one a macro of the other.
 789
 790 2005-10-21  DJ Delorie  <dj@redhat.com>
 791
 792         * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
 793         (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
 794         indexld, indexls): .w variants have `1' bit.
 795         (rot32.b): QI, not SI.
 796         (rot32.w): HI, not SI.
 797         (xchg16): HI for .w variant.
 798
 799 2005-10-19  Nick Clifton  <nickc@redhat.com>
 800
 801         * m32r.opc (parse_slo16): Fix bad application of previous patch.
 802
 803 2005-10-18  Andreas Schwab  <schwab@suse.de>
 804
 805         * m32r.opc (parse_slo16): Better version of previous patch.
 806
 807 2005-10-14  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 808
 809         * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
 810         size.
 811
 812 2005-07-25  DJ Delorie  <dj@redhat.com>
 813
 814         * m32c.opc (parse_unsigned8): Add %dsp8().
 815         (parse_signed8): Add %hi8().
 816         (parse_unsigned16): Add %dsp16().
 817         (parse_signed16): Add %lo16() and %hi16().
 818         (parse_lab_5_3): Make valuep a bfd_vma *.
 819
 820 2005-07-18  Nick Clifton  <nickc@redhat.com>
 821
 822         * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
 823         components.
 824         (f-lab32-jmp-s): Fix insertion sequence.
 825         (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
 826         (Dsp-40-s8): Make parameter be signed.
 827         (Dsp-40-s16): Likewise.
 828         (Dsp-48-s8): Likewise.
 829         (Dsp-48-s16): Likewise.
 830         (Imm-13-u3): Likewise. (Despite its name!)
 831         (BitBase16-16-s8): Make the parameter be unsigned.
 832         (BitBase16-8-u11-S): Likewise.
 833         (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
 834         jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
 835         relaxation.
 836
 837         * m32c.opc: Fix formatting.
 838         Use safe-ctype.h instead of ctype.h
 839         Move duplicated code sequences into a macro.
 840         Fix compile time warnings about signedness mismatches.
 841         Remove dead code.
 842         (parse_lab_5_3): New parser function.
 843
 844 2005-07-16  Jim Blandy  <jimb@redhat.com>
 845
 846         * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
 847         to represent isa sets.
 848
 849 2005-07-15  Jim Blandy  <jimb@redhat.com>
 850
 851         * m32c.cpu, m32c.opc: Fix copyright.
 852
 853 2005-07-14  Jim Blandy  <jimb@redhat.com>
 854
 855         * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
 856
 857 2005-07-14  Alan Modra  <amodra@bigpond.net.au>
 858
 859         * ms1.opc (print_dollarhex): Correct format string.
 860
 861 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
 862
 863         * iq2000.cpu: Include from binutils cpu dir.
 864
 865 2005-07-05  Nick Clifton  <nickc@redhat.com>
 866
 867         * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
 868         unsigned in order to avoid compile time warnings about sign
 869         conflicts.
 870
 871         * ms1.opc (parse_*): Likewise.
 872         (parse_imm16): Use a "void *" as it is passed both signed and
 873         unsigned arguments.
 874
 875 2005-07-01  Nick Clifton  <nickc@redhat.com>
 876
 877         * frv.opc: Update to ISO C90 function declaration style.
 878         * iq2000.opc: Likewise.
 879         * m32r.opc: Likewise.
 880         * sh.opc: Likewise.
 881
 882 2005-06-15  Dave Brolley  <brolley@redhat.com>
 883
 884         Contributed by Red Hat.
 885         * ms1.cpu: New file.  Written by Nick Clifton, Stan Cox.
 886         * ms1.opc: New file.  Written by Stan Cox.
 887
 888 2005-05-10  Nick Clifton  <nickc@redhat.com>
 889
 890         * Update the address and phone number of the FSF organization in
 891         the GPL notices in the following files:
 892         cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
 893         m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
 894         sh64-media.cpu, simplify.inc
 895
 896 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 897
 898         * frv.opc (parse_A): Warning fix.
 899
 900 2005-02-23  Nick Clifton  <nickc@redhat.com>
 901
 902         * frv.opc: Fixed compile time warnings about differing signed'ness
 903         of pointers passed to functions.
 904         * m32r.opc: Likewise.
 905
 906 2005-02-11  Nick Clifton  <nickc@redhat.com>
 907
 908         * iq2000.opc (parse_jtargq10): Change type of valuep argument to
 909         'bfd_vma *' in order avoid compile time warning message.
 910
 911 2005-01-28  Hans-Peter Nilsson  <hp@axis.com>
 912
 913         * cris.cpu (mstep): Add missing insn.
 914
 915 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 916
 917         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 918         * frv.cpu: Add support for TLS annotations in loads and calll.
 919         * frv.opc (parse_symbolic_address): New.
 920         (parse_ldd_annotation): New.
 921         (parse_call_annotation): New.
 922         (parse_ld_annotation): New.
 923         (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
 924         Introduce TLS relocations.
 925         (parse_d12, parse_s12, parse_u12): Likewise.
 926         (parse_uhi16): Likewise.  Fix constant checking on 64-bit host.
 927         (parse_call_label, print_at): New.
 928
 929 2004-12-21  Mikael Starvik  <starvik@axis.com>
 930
 931         * cris.cpu (cris-set-mem): Correct integral write semantics.
 932
 933 2004-11-29  Hans-Peter Nilsson  <hp@axis.com>
 934
 935         * cris.cpu: New file.
 936
 937 2004-11-15  Michael K. Lechner <mike.lechner@gmail.com>
 938
 939         * iq2000.cpu: Added quotes around macro arguments so that they
 940         will work with newer versions of guile.
 941
 942 2004-10-27  Nick Clifton  <nickc@redhat.com>
 943
 944         * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
 945         wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
 946         operand.
 947         * iq2000.cpu (dnop index): Rename to _index to avoid complications
 948         with guile.
 949
 950 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 951
 952         * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
 953
 954 2004-05-15  Nick Clifton  <nickc@redhat.com>
 955
 956         * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
 957
 958 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 959
 960         * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
 961
 962 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 963
 964         * frv.cpu (define-arch frv): Add fr450 mach.
 965         (define-mach fr450): New.
 966         (define-model fr450): New.  Add profile units to every fr450 insn.
 967         (define-attr UNIT): Add MDCUTSSI.
 968         (define-attr FR450-MAJOR): New enum.  Add to every fr450 insn.
 969         (define-attr AUDIO): New boolean.
 970         (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
 971         (f-LRA-null, f-TLBPR-null): New fields.
 972         (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
 973         (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
 974         (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
 975         (LRA-null, TLBPR-null): New macros.
 976         (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
 977         (load-real-address): New macro.
 978         (lrai, lrad, tlbpr): New instructions.
 979         (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
 980         (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
 981         (mdcutssi): Change UNIT attribute to MDCUTSSI.
 982         (media-low-clear-semantics, media-scope-limit-semantics)
 983         (media-quad-limit, media-quad-shift): New macros.
 984         (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
 985         * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
 986         (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
 987         (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
 988         (fr450_unit_mapping): New array.
 989         (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
 990         for new MDCUTSSI unit.
 991         (fr450_check_insn_major_constraints): New function.
 992         (check_insn_major_constraints): Use it.
 993
 994 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 995
 996         * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
 997         (scutss): Change unit to I0.
 998         (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
 999         (mqsaths): Fix FR400-MAJOR categorization.
1000         (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
1001         (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
1002         * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
1003         combinations.
1004
1005 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1006
1007         * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
1008         (rstb, rsth, rst, rstd, rstq): Delete.
1009         (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
1010
1011 2004-02-23  Nick Clifton  <nickc@redhat.com>
1012
1013         * Apply these patches from Renesas:
1014
1015         2004-02-10  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1016
1017         * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
1018         disassembling codes for 0x*2 addresses.
1019
1020         2003-12-15  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1021
1022         * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
1023
1024         2003-12-03  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1025
1026         * cpu/m32r.cpu : Add new model m32r2.
1027         Add new instructions.
1028         Replace occurrances of 'Mitsubishi' with 'Renesas'.
1029         Changed PIPE attr of push from O to OS.
1030         Care for Little-endian of M32R.
1031         * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
1032         Care for Little-endian of M32R.
1033         (parse_slo16): signed extension for value.
1034
1035 2004-02-20  Andrew Cagney  <cagney@redhat.com>
1036
1037         * m32r.opc, m32r.cpu: New files.  Written by , Doug Evans, Nick
1038         Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
1039
1040         * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
1041         written by Ben Elliston.
1042
1043 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1044
1045         * frv.cpu (UNIT): Add IACC.
1046         (iacc-multiply-r-r): Use it.
1047         * frv.opc (fr400_unit_mapping): Add entry for IACC.
1048         (fr500_unit_mapping, fr550_unit_mapping): Likewise.
1049
1050 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1051
1052         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1053         * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
1054         cut&paste errors in shifting/truncating numerical operands.
1055         2003-08-08  Alexandre Oliva  <aoliva@redhat.com>
1056         * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1057         (parse_uslo16): Likewise.
1058         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1059         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1060         (parse_s12): Likewise.
1061         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1062         * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
1063         (parse_uslo16): Likewise.
1064         (parse_uhi16): Parse gothi and gotfuncdeschi.
1065         (parse_d12): Parse got12 and gotfuncdesc12.
1066         (parse_s12): Likewise.
1067
1068 2003-10-10  Dave Brolley  <brolley@redhat.com>
1069
1070         * frv.cpu (dnpmop): New p-macro.
1071         (GRdoublek): Use dnpmop.
1072         (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
1073         (store-double-r-r): Use (.sym regtype doublek).
1074         (r-store-double): Ditto.
1075         (store-double-r-r-u): Ditto.
1076         (conditional-store-double): Ditto.
1077         (conditional-store-double-u): Ditto.
1078         (store-double-r-simm): Ditto.
1079         (fmovs): Assign to UNIT FMALL.
1080
1081 2003-10-06  Dave Brolley  <brolley@redhat.com>
1082
1083         * frv.cpu, frv.opc: Add support for fr550.
1084
1085 2003-09-24  Dave Brolley  <brolley@redhat.com>
1086
1087         * frv.cpu (u-commit): New modelling unit for fr500.
1088         (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
1089         (commit-r): Use u-commit model for fr500.
1090         (commit): Ditto.
1091         (conditional-float-binary-op): Take profiling data as an argument.
1092         Update callers.
1093         (ne-float-binary-op): Ditto.
1094
1095 2003-09-19  Michael Snyder  <msnyder@redhat.com>
1096
1097         * frv.cpu (nldqi): Delete unimplemented instruction.
1098
1099 2003-09-12  Dave Brolley  <brolley@redhat.com>
1100
1101         * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
1102         (clear-ne-flag-r): Pass insn profiling in as an argument. Call
1103         frv_ref_SI to get input register referenced for profiling.
1104         (clear-ne-flag-all): Pass insn profiling in as an argument.
1105         (clrgr,clrfr,clrga,clrfa): Add profiling information.
1106
1107 2003-09-11  Michael Snyder  <msnyder@redhat.com>
1108
1109         * frv.cpu: Typographical corrections.
1110
1111 2003-09-09  Dave Brolley  <brolley@redhat.com>
1112
1113         * frv.cpu (media-dual-complex): Change UNIT to FMALL.
1114         (conditional-media-dual-complex, media-quad-complex): Likewise.
1115
1116 2003-09-04  Dave Brolley  <brolley@redhat.com>
1117
1118         * frv.cpu (register-transfer): Pass in all attributes in on argument.
1119         Update all callers.
1120         (conditional-register-transfer): Ditto.
1121         (cache-preload): Ditto.
1122         (floating-point-conversion): Ditto.
1123         (floating-point-neg): Ditto.
1124         (float-abs): Ditto.
1125         (float-binary-op-s): Ditto.
1126         (conditional-float-binary-op): Ditto.
1127         (ne-float-binary-op): Ditto.
1128         (float-dual-arith): Ditto.
1129         (ne-float-dual-arith): Ditto.
1130
1131 2003-09-03  Dave Brolley  <brolley@redhat.com>
1132
1133         * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
1134         * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
1135         MCLRACC-1.
1136         (A): Removed operand.
1137         (A0,A1): New operands replace operand A.
1138         (mnop): Now a real insn
1139         (mclracc): Removed insn.
1140         (mclracc-0, mclracc-1): New insns replace mclracc.
1141         (all insns): Use new UNIT attributes.
1142
1143 2003-08-21  Nick Clifton  <nickc@redhat.com>
1144
1145         * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
1146         and u-media-dual-btoh with output parameter.
1147         (cmbtoh): Add profiling hack.
1148
1149 2003-08-19  Michael Snyder  <msnyder@redhat.com>
1150
1151         * frv.cpu: Fix typo, Frintkeven -> FRintkeven
1152
1153 2003-06-10  Doug Evans  <dje@sebabeach.org>
1154
1155         * frv.cpu: Add IDOC attribute.
1156
1157 2003-06-06  Andrew Cagney  <cagney@redhat.com>
1158
1159         Contributed by Red Hat.
1160         * iq2000.cpu: New file.  Written by Ben Elliston, Jeff Johnston,
1161         Stan Cox, and Frank Ch. Eigler.
1162         * iq2000.opc: New file.  Written by Ben Elliston, Frank
1163         Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
1164         * iq2000m.cpu: New file.  Written by Jeff Johnston.
1165         * iq10.cpu: New file.  Written by Jeff Johnston.
1166
1167 2003-06-05  Nick Clifton  <nickc@redhat.com>
1168
1169         * frv.cpu (FRintieven): New operand.  An even-numbered only
1170         version of the FRinti operand.
1171         (FRintjeven): Likewise for FRintj.
1172         (FRintkeven): Likewise for FRintk.
1173         (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
1174         media-quad-arith-sat-semantics, media-quad-arith-sat,
1175         conditional-media-quad-arith-sat, mdunpackh,
1176         media-quad-multiply-semantics, media-quad-multiply,
1177         conditional-media-quad-multiply, media-quad-complex-i,
1178         media-quad-multiply-acc-semantics, media-quad-multiply-acc,
1179         conditional-media-quad-multiply-acc, munpackh,
1180         media-quad-multiply-cross-acc-semantics, mdpackh,
1181         media-quad-multiply-cross-acc, mbtoh-semantics,
1182         media-quad-cross-multiply-cross-acc-semantics,
1183         media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
1184         media-quad-cross-multiply-acc-semantics, cmbtoh,
1185         media-quad-cross-multiply-acc, media-quad-complex, mhtob,
1186         media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
1187         cmhtob): Use new operands.
1188         * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
1189         (parse_even_register): New function.
1190
1191 2003-06-03  Nick Clifton  <nickc@redhat.com>
1192
1193         * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
1194         immediate value not unsigned.
1195
1196 2003-06-03  Andrew Cagney  <cagney@redhat.com>
1197
1198         Contributed by Red Hat.
1199         * frv.cpu: New file.  Written by Dave Brolley, Catherine Moore,
1200         and Eric Christopher.
1201         * frv.opc: New file.  Written by Catherine Moore, and Dave
1202         Brolley.
1203         * simplify.inc: New file.  Written by Doug Evans.
1204
1205 2003-05-02  Andrew Cagney  <cagney@redhat.com>
1206
1207         * New file.
1208
1209 \f
1210 Copyright (C) 2003-2012 Free Software Foundation, Inc.
1211
1212 Copying and distribution of this file, with or without modification,
1213 are permitted in any medium without royalty provided the copyright
1214 notice and this notice are preserved.
1215
1216 Local Variables:
1217 mode: change-log
1218 left-margin: 8
1219 fill-column: 74
1220 version-control: never
1221 End: