cpu/base.hh

   1 /*
   2  * Copyright (c) 2002-2005 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  */
  28
  29 #ifndef __CPU_BASE_HH__
  30 #define __CPU_BASE_HH__
  31
  32 #include <vector>
  33
  34 #include "base/statistics.hh"
  35 #include "config/full_system.hh"
  36 #include "cpu/sampler/sampler.hh"
  37 #include "sim/eventq.hh"
  38 #include "sim/sim_object.hh"
  39 #include "targetarch/isa_traits.hh"
  40
  41 #if FULL_SYSTEM
  42 class System;
  43 #endif
  44
  45 class BranchPred;
  46 class ExecContext;
  47
  48 class BaseCPU : public SimObject
  49 {
  50   protected:
  51     // CPU's clock period in terms of the number of ticks of curTime.
  52     Tick clock;
  53
  54   public:
  55     inline Tick frequency() const { return Clock::Frequency / clock; }
  56     inline Tick cycles(int numCycles) const { return clock * numCycles; }
  57     inline Tick curCycle() const { return curTick / clock; }
  58
  59 #if FULL_SYSTEM
  60   protected:
  61     uint64_t interrupts[NumInterruptLevels];
  62     uint64_t intstatus;
  63
  64   public:
  65     virtual void post_interrupt(int int_num, int index);
  66     virtual void clear_interrupt(int int_num, int index);
  67     virtual void clear_interrupts();
  68     bool checkInterrupts;
  69
  70     bool check_interrupt(int int_num) const {
  71         if (int_num > NumInterruptLevels)
  72             panic("int_num out of bounds\n");
  73
  74         return interrupts[int_num] != 0;
  75     }
  76
  77     bool check_interrupts() const { return intstatus != 0; }
  78     uint64_t intr_status() const { return intstatus; }
  79
  80     class ProfileEvent : public Event
  81     {
  82       private:
  83         BaseCPU *cpu;
  84         int interval;
  85
  86       public:
  87         ProfileEvent(BaseCPU *cpu, int interval);
  88         void process();
  89     };
  90     ProfileEvent *profileEvent;
  91 #endif
  92
  93   protected:
  94     std::vector<ExecContext *> execContexts;
  95
  96   public:
  97
  98     /// Notify the CPU that the indicated context is now active.  The
  99     /// delay parameter indicates the number of ticks to wait before
 100     /// executing (typically 0 or 1).
 101     virtual void activateContext(int thread_num, int delay) {}
 102
 103     /// Notify the CPU that the indicated context is now suspended.
 104     virtual void suspendContext(int thread_num) {}
 105
 106     /// Notify the CPU that the indicated context is now deallocated.
 107     virtual void deallocateContext(int thread_num) {}
 108
 109     /// Notify the CPU that the indicated context is now halted.
 110     virtual void haltContext(int thread_num) {}
 111
 112   public:
 113     struct Params
 114     {
 115         std::string name;
 116         int numberOfThreads;
 117         bool deferRegistration;
 118         Counter max_insts_any_thread;
 119         Counter max_insts_all_threads;
 120         Counter max_loads_any_thread;
 121         Counter max_loads_all_threads;
 122         Tick clock;
 123         bool functionTrace;
 124         Tick functionTraceStart;
 125 #if FULL_SYSTEM
 126         System *system;
 127         int cpu_id;
 128         Tick profile;
 129 #endif
 130
 131         Params();
 132     };
 133
 134     const Params *params;
 135
 136     BaseCPU(Params *params);
 137     virtual ~BaseCPU();
 138
 139     virtual void init();
 140     virtual void startup();
 141     virtual void regStats();
 142
 143     void registerExecContexts();
 144
 145     /// Prepare for another CPU to take over execution.  When it is
 146     /// is ready (drained pipe) it signals the sampler.
 147     virtual void switchOut(Sampler *);
 148
 149     /// Take over execution from the given CPU.  Used for warm-up and
 150     /// sampling.
 151     virtual void takeOverFrom(BaseCPU *);
 152
 153     /**
 154      *  Number of threads we're actually simulating (<= SMT_MAX_THREADS).
 155      * This is a constant for the duration of the simulation.
 156      */
 157     int number_of_threads;
 158
 159     /**
 160      * Vector of per-thread instruction-based event queues.  Used for
 161      * scheduling events based on number of instructions committed by
 162      * a particular thread.
 163      */
 164     EventQueue **comInstEventQueue;
 165
 166     /**
 167      * Vector of per-thread load-based event queues.  Used for
 168      * scheduling events based on number of loads committed by
 169      *a particular thread.
 170      */
 171     EventQueue **comLoadEventQueue;
 172
 173 #if FULL_SYSTEM
 174     System *system;
 175
 176     /**
 177      * Serialize this object to the given output stream.
 178      * @param os The stream to serialize to.
 179      */
 180     virtual void serialize(std::ostream &os);
 181
 182     /**
 183      * Reconstruct the state of this object from a checkpoint.
 184      * @param cp The checkpoint use.
 185      * @param section The section name of this object
 186      */
 187     virtual void unserialize(Checkpoint *cp, const std::string &section);
 188
 189 #endif
 190
 191     /**
 192      * Return pointer to CPU's branch predictor (NULL if none).
 193      * @return Branch predictor pointer.
 194      */
 195     virtual BranchPred *getBranchPred() { return NULL; };
 196
 197     virtual Counter totalInstructions() const { return 0; }
 198
 199     // Function tracing
 200   private:
 201     bool functionTracingEnabled;
 202     std::ostream *functionTraceStream;
 203     Addr currentFunctionStart;
 204     Addr currentFunctionEnd;
 205     Tick functionEntryTick;
 206     void enableFunctionTrace();
 207     void traceFunctionsInternal(Addr pc);
 208
 209   protected:
 210     void traceFunctions(Addr pc)
 211     {
 212         if (functionTracingEnabled)
 213             traceFunctionsInternal(pc);
 214     }
 215
 216   private:
 217     static std::vector<BaseCPU *> cpuList;   //!< Static global cpu list
 218
 219   public:
 220     static int numSimulatedCPUs() { return cpuList.size(); }
 221     static Counter numSimulatedInstructions()
 222     {
 223         Counter total = 0;
 224
 225         int size = cpuList.size();
 226         for (int i = 0; i < size; ++i)
 227             total += cpuList[i]->totalInstructions();
 228
 229         return total;
 230     }
 231
 232   public:
 233     // Number of CPU cycles simulated
 234     Stats::Scalar<> numCycles;
 235 };
 236
 237 #endif // __CPU_BASE_HH__