Merge zizzer:/bk/m5
[gem5.git] / cpu / base.hh
1 /*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #ifndef __CPU_BASE_HH__
30 #define __CPU_BASE_HH__
31
32 #include <vector>
33
34 #include "base/statistics.hh"
35 #include "config/full_system.hh"
36 #include "cpu/profile.hh"
37 #include "cpu/sampler/sampler.hh"
38 #include "sim/eventq.hh"
39 #include "sim/sim_object.hh"
40 #include "targetarch/isa_traits.hh"
41
42 #if FULL_SYSTEM
43 class System;
44 #endif
45
46 class BranchPred;
47 class ExecContext;
48
49 class BaseCPU : public SimObject
50 {
51 protected:
52 // CPU's clock period in terms of the number of ticks of curTime.
53 Tick clock;
54
55 public:
56 inline Tick frequency() const { return Clock::Frequency / clock; }
57 inline Tick cycles(int numCycles) const { return clock * numCycles; }
58 inline Tick curCycle() const { return curTick / clock; }
59
60 #if FULL_SYSTEM
61 protected:
62 uint64_t interrupts[NumInterruptLevels];
63 uint64_t intstatus;
64
65 public:
66 virtual void post_interrupt(int int_num, int index);
67 virtual void clear_interrupt(int int_num, int index);
68 virtual void clear_interrupts();
69 bool checkInterrupts;
70
71 bool check_interrupt(int int_num) const {
72 if (int_num > NumInterruptLevels)
73 panic("int_num out of bounds\n");
74
75 return interrupts[int_num] != 0;
76 }
77
78 bool check_interrupts() const { return intstatus != 0; }
79 uint64_t intr_status() const { return intstatus; }
80
81 class ProfileEvent : public Event
82 {
83 private:
84 BaseCPU *cpu;
85 int interval;
86
87 public:
88 ProfileEvent(BaseCPU *cpu, int interval);
89 void process();
90 };
91 ProfileEvent *profileEvent;
92 #endif
93
94 protected:
95 std::vector<ExecContext *> execContexts;
96
97 public:
98
99 /// Notify the CPU that the indicated context is now active. The
100 /// delay parameter indicates the number of ticks to wait before
101 /// executing (typically 0 or 1).
102 virtual void activateContext(int thread_num, int delay) {}
103
104 /// Notify the CPU that the indicated context is now suspended.
105 virtual void suspendContext(int thread_num) {}
106
107 /// Notify the CPU that the indicated context is now deallocated.
108 virtual void deallocateContext(int thread_num) {}
109
110 /// Notify the CPU that the indicated context is now halted.
111 virtual void haltContext(int thread_num) {}
112
113 public:
114 struct Params
115 {
116 std::string name;
117 int numberOfThreads;
118 bool deferRegistration;
119 Counter max_insts_any_thread;
120 Counter max_insts_all_threads;
121 Counter max_loads_any_thread;
122 Counter max_loads_all_threads;
123 Tick clock;
124 bool functionTrace;
125 Tick functionTraceStart;
126 #if FULL_SYSTEM
127 System *system;
128 int cpu_id;
129 Tick profile;
130 #endif
131
132 Params();
133 };
134
135 const Params *params;
136
137 BaseCPU(Params *params);
138 virtual ~BaseCPU();
139
140 virtual void init();
141 virtual void startup();
142 virtual void regStats();
143
144 void registerExecContexts();
145
146 /// Prepare for another CPU to take over execution. When it is
147 /// is ready (drained pipe) it signals the sampler.
148 virtual void switchOut(Sampler *);
149
150 /// Take over execution from the given CPU. Used for warm-up and
151 /// sampling.
152 virtual void takeOverFrom(BaseCPU *);
153
154 /**
155 * Number of threads we're actually simulating (<= SMT_MAX_THREADS).
156 * This is a constant for the duration of the simulation.
157 */
158 int number_of_threads;
159
160 /**
161 * Vector of per-thread instruction-based event queues. Used for
162 * scheduling events based on number of instructions committed by
163 * a particular thread.
164 */
165 EventQueue **comInstEventQueue;
166
167 /**
168 * Vector of per-thread load-based event queues. Used for
169 * scheduling events based on number of loads committed by
170 *a particular thread.
171 */
172 EventQueue **comLoadEventQueue;
173
174 #if FULL_SYSTEM
175 System *system;
176
177 /**
178 * Serialize this object to the given output stream.
179 * @param os The stream to serialize to.
180 */
181 virtual void serialize(std::ostream &os);
182
183 /**
184 * Reconstruct the state of this object from a checkpoint.
185 * @param cp The checkpoint use.
186 * @param section The section name of this object
187 */
188 virtual void unserialize(Checkpoint *cp, const std::string &section);
189
190 #endif
191
192 /**
193 * Return pointer to CPU's branch predictor (NULL if none).
194 * @return Branch predictor pointer.
195 */
196 virtual BranchPred *getBranchPred() { return NULL; };
197
198 virtual Counter totalInstructions() const { return 0; }
199
200 // Function tracing
201 private:
202 bool functionTracingEnabled;
203 std::ostream *functionTraceStream;
204 Addr currentFunctionStart;
205 Addr currentFunctionEnd;
206 Tick functionEntryTick;
207 void enableFunctionTrace();
208 void traceFunctionsInternal(Addr pc);
209
210 protected:
211 void traceFunctions(Addr pc)
212 {
213 if (functionTracingEnabled)
214 traceFunctionsInternal(pc);
215 }
216
217 private:
218 static std::vector<BaseCPU *> cpuList; //!< Static global cpu list
219
220 public:
221 static int numSimulatedCPUs() { return cpuList.size(); }
222 static Counter numSimulatedInstructions()
223 {
224 Counter total = 0;
225
226 int size = cpuList.size();
227 for (int i = 0; i < size; ++i)
228 total += cpuList[i]->totalInstructions();
229
230 return total;
231 }
232
233 public:
234 // Number of CPU cycles simulated
235 Stats::Scalar<> numCycles;
236 };
237
238 #endif // __CPU_BASE_HH__