2 * Copyright (c) 2003 The Regents of The University of Michigan
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33 #include "cpu/base_cpu.hh"
34 #include "base/cprintf.hh"
35 #include "cpu/exec_context.hh"
36 #include "base/misc.hh"
37 #include "sim/param.hh"
38 #include "sim/sim_events.hh"
42 vector
<BaseCPU
*> BaseCPU::cpuList
;
44 // This variable reflects the max number of threads in any CPU. Be
45 // careful to only use it once all the CPUs that you care about have
47 int maxThreadsPerCPU
= 1;
50 BaseCPU::BaseCPU(const string
&_name
, int _number_of_threads
,
51 Counter max_insts_any_thread
,
52 Counter max_insts_all_threads
,
53 Counter max_loads_any_thread
,
54 Counter max_loads_all_threads
,
55 System
*_system
, Tick freq
)
56 : SimObject(_name
), frequency(freq
),
57 number_of_threads(_number_of_threads
), system(_system
)
59 BaseCPU::BaseCPU(const string
&_name
, int _number_of_threads
,
60 Counter max_insts_any_thread
,
61 Counter max_insts_all_threads
,
62 Counter max_loads_any_thread
,
63 Counter max_loads_all_threads
)
64 : SimObject(_name
), number_of_threads(_number_of_threads
)
67 // add self to global list of CPUs
68 cpuList
.push_back(this);
70 if (number_of_threads
> maxThreadsPerCPU
)
71 maxThreadsPerCPU
= number_of_threads
;
73 // allocate per-thread instruction-based event queues
74 comInstEventQueue
= new (EventQueue
*)[number_of_threads
];
75 for (int i
= 0; i
< number_of_threads
; ++i
)
76 comInstEventQueue
[i
] = new EventQueue("instruction-based event queue");
79 // set up instruction-count-based termination events, if any
81 if (max_insts_any_thread
!= 0)
82 for (int i
= 0; i
< number_of_threads
; ++i
)
83 new SimExitEvent(comInstEventQueue
[i
], max_insts_any_thread
,
84 "a thread reached the max instruction count");
86 if (max_insts_all_threads
!= 0) {
87 // allocate & initialize shared downcounter: each event will
88 // decrement this when triggered; simulation will terminate
89 // when counter reaches 0
90 int *counter
= new int;
91 *counter
= number_of_threads
;
92 for (int i
= 0; i
< number_of_threads
; ++i
)
93 new CountedExitEvent(comInstEventQueue
[i
],
94 "all threads reached the max instruction count",
95 max_insts_all_threads
, *counter
);
98 // allocate per-thread load-based event queues
99 comLoadEventQueue
= new (EventQueue
*)[number_of_threads
];
100 for (int i
= 0; i
< number_of_threads
; ++i
)
101 comLoadEventQueue
[i
] = new EventQueue("load-based event queue");
104 // set up instruction-count-based termination events, if any
106 if (max_loads_any_thread
!= 0)
107 for (int i
= 0; i
< number_of_threads
; ++i
)
108 new SimExitEvent(comLoadEventQueue
[i
], max_loads_any_thread
,
109 "a thread reached the max load count");
111 if (max_loads_all_threads
!= 0) {
112 // allocate & initialize shared downcounter: each event will
113 // decrement this when triggered; simulation will terminate
114 // when counter reaches 0
115 int *counter
= new int;
116 *counter
= number_of_threads
;
117 for (int i
= 0; i
< number_of_threads
; ++i
)
118 new CountedExitEvent(comLoadEventQueue
[i
],
119 "all threads reached the max load count",
120 max_loads_all_threads
, *counter
);
124 memset(interrupts
, 0, sizeof(interrupts
));
133 int size
= execContexts
.size();
135 for (int i
= 0; i
< size
; ++i
) {
136 stringstream namestr
;
137 ccprintf(namestr
, "%s.ctx%d", name(), i
);
138 execContexts
[i
]->regStats(namestr
.str());
140 } else if (size
== 1)
141 execContexts
[0]->regStats(name());
146 BaseCPU::registerExecContexts()
148 for (int i
= 0; i
< execContexts
.size(); ++i
) {
149 ExecContext
*xc
= execContexts
[i
];
153 cpu_id
= system
->registerExecContext(xc
);
155 cpu_id
= xc
->process
->registerExecContext(xc
);
166 // default: do nothing
170 BaseCPU::takeOverFrom(BaseCPU
*oldCPU
)
172 assert(execContexts
.size() == oldCPU
->execContexts
.size());
174 for (int i
= 0; i
< execContexts
.size(); ++i
) {
175 ExecContext
*newXC
= execContexts
[i
];
176 ExecContext
*oldXC
= oldCPU
->execContexts
[i
];
178 newXC
->takeOverFrom(oldXC
);
179 assert(newXC
->cpu_id
== oldXC
->cpu_id
);
181 system
->replaceExecContext(newXC
->cpu_id
, newXC
);
183 assert(newXC
->process
== oldXC
->process
);
184 newXC
->process
->replaceExecContext(newXC
->cpu_id
, newXC
);
189 for (int i
= 0; i
< NumInterruptLevels
; ++i
)
190 interrupts
[i
] = oldCPU
->interrupts
[i
];
191 intstatus
= oldCPU
->intstatus
;
198 BaseCPU::post_interrupt(int int_num
, int index
)
200 DPRINTF(Interrupt
, "Interrupt %d:%d posted\n", int_num
, index
);
202 if (int_num
< 0 || int_num
>= NumInterruptLevels
)
203 panic("int_num out of bounds\n");
205 if (index
< 0 || index
>= sizeof(uint8_t) * 8)
206 panic("int_num out of bounds\n");
208 AlphaISA::check_interrupts
= 1;
209 interrupts
[int_num
] |= 1 << index
;
210 intstatus
|= (ULL(1) << int_num
);
214 BaseCPU::clear_interrupt(int int_num
, int index
)
216 DPRINTF(Interrupt
, "Interrupt %d:%d cleared\n", int_num
, index
);
218 if (int_num
< 0 || int_num
>= NumInterruptLevels
)
219 panic("int_num out of bounds\n");
221 if (index
< 0 || index
>= sizeof(uint8_t) * 8)
222 panic("int_num out of bounds\n");
224 interrupts
[int_num
] &= ~(1 << index
);
225 if (interrupts
[int_num
] == 0)
226 intstatus
&= ~(ULL(1) << int_num
);
230 BaseCPU::clear_interrupts()
232 DPRINTF(Interrupt
, "Interrupts all cleared\n");
234 memset(interrupts
, 0, sizeof(interrupts
));
238 #endif // FULL_SYSTEM
240 DEFINE_SIM_OBJECT_CLASS_NAME("BaseCPU", BaseCPU
)