Minor format tweaks on config file documentation.
[gem5.git] / cpu / beta_cpu / alpha_impl.hh
1 /*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #ifndef __CPU_BETA_CPU_ALPHA_IMPL_HH__
30 #define __CPU_BETA_CPU_ALPHA_IMPL_HH__
31
32 #include "arch/alpha/isa_traits.hh"
33
34 #include "cpu/beta_cpu/alpha_params.hh"
35 #include "cpu/beta_cpu/cpu_policy.hh"
36
37 // Forward declarations.
38 template <class Impl>
39 class AlphaDynInst;
40
41 template <class Impl>
42 class AlphaFullCPU;
43
44 /** Implementation specific struct that defines several key things to the
45 * CPU, the stages within the CPU, the time buffers, and the DynInst.
46 * The struct defines the ISA, the CPU policy, the specific DynInst, the
47 * specific FullCPU, and all of the structs from the time buffers to do
48 * communication.
49 * This is one of the key things that must be defined for each hardware
50 * specific CPU implementation.
51 */
52 struct AlphaSimpleImpl
53 {
54 /** The ISA to be used. */
55 typedef AlphaISA ISA;
56
57 /** The type of MachInst. */
58 typedef ISA::MachInst MachInst;
59
60 /** The CPU policy to be used (ie fetch, decode, etc.). */
61 typedef SimpleCPUPolicy<AlphaSimpleImpl> CPUPol;
62
63 /** The DynInst to be used. */
64 typedef AlphaDynInst<AlphaSimpleImpl> DynInst;
65
66 /** The refcounted DynInst pointer to be used. In most cases this is
67 * what should be used, and not DynInst *.
68 */
69 typedef RefCountingPtr<DynInst> DynInstPtr;
70
71 /** The FullCPU to be used. */
72 typedef AlphaFullCPU<AlphaSimpleImpl> FullCPU;
73
74 /** The Params to be passed to each stage. */
75 typedef AlphaSimpleParams Params;
76
77 enum {
78 MaxWidth = 8
79 };
80 };
81
82 #endif // __CPU_BETA_CPU_ALPHA_IMPL_HH__