Merge ktlim@zizzer.eecs.umich.edu:/bk/m5
[gem5.git] / cpu / beta_cpu / cpu_policy.hh
1 #ifndef __CPU_BETA_CPU_CPU_POLICY_HH__
2 #define __CPU_BETA_CPU_CPU_POLICY_HH__
3
4 #include "cpu/beta_cpu/bpred_unit.hh"
5 #include "cpu/beta_cpu/inst_queue.hh"
6 #include "cpu/beta_cpu/regfile.hh"
7 #include "cpu/beta_cpu/free_list.hh"
8 #include "cpu/beta_cpu/rename_map.hh"
9 #include "cpu/beta_cpu/rob.hh"
10 #include "cpu/beta_cpu/store_set.hh"
11 #include "cpu/beta_cpu/mem_dep_unit.hh"
12 #include "cpu/beta_cpu/ldstq.hh"
13
14 #include "cpu/beta_cpu/fetch.hh"
15 #include "cpu/beta_cpu/decode.hh"
16 #include "cpu/beta_cpu/rename.hh"
17 #include "cpu/beta_cpu/iew.hh"
18 #include "cpu/beta_cpu/commit.hh"
19
20 #include "cpu/beta_cpu/comm.hh"
21
22 template<class Impl>
23 struct SimpleCPUPolicy
24 {
25 typedef TwobitBPredUnit<Impl> BPredUnit;
26 typedef PhysRegFile<Impl> RegFile;
27 typedef SimpleFreeList FreeList;
28 typedef SimpleRenameMap RenameMap;
29 typedef ROB<Impl> ROB;
30 typedef InstructionQueue<Impl> IQ;
31 typedef MemDepUnit<StoreSet, Impl> MemDepUnit;
32 typedef LDSTQ<Impl> LDSTQ;
33
34 typedef SimpleFetch<Impl> Fetch;
35 typedef SimpleDecode<Impl> Decode;
36 typedef SimpleRename<Impl> Rename;
37 typedef SimpleIEW<Impl, IQ> IEW;
38 typedef SimpleCommit<Impl> Commit;
39
40 /** The struct for communication between fetch and decode. */
41 typedef SimpleFetchSimpleDecode<Impl> FetchStruct;
42
43 /** The struct for communication between decode and rename. */
44 typedef SimpleDecodeSimpleRename<Impl> DecodeStruct;
45
46 /** The struct for communication between rename and IEW. */
47 typedef SimpleRenameSimpleIEW<Impl> RenameStruct;
48
49 /** The struct for communication between IEW and commit. */
50 typedef SimpleIEWSimpleCommit<Impl> IEWStruct;
51
52 /** The struct for communication within the IEW stage. */
53 typedef IssueStruct<Impl> IssueStruct;
54
55 /** The struct for all backwards communication. */
56 typedef TimeBufStruct TimeStruct;
57
58 };
59
60 #endif //__CPU_BETA_CPU_CPU_POLICY_HH__