Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5
[gem5.git] / cpu / beta_cpu / store_set.hh
1 #ifndef __STORE_SET_HH__
2 #define __STORE_SET_HH__
3
4 #include <vector>
5
6 #include "arch/alpha/isa_traits.hh"
7 #include "cpu/inst_seq.hh"
8
9 class StoreSet
10 {
11 public:
12 typedef unsigned SSID;
13
14 public:
15 StoreSet(int SSIT_size, int LFST_size);
16
17 void violation(Addr store_PC, Addr load_PC);
18
19 void insertLoad(Addr load_PC, InstSeqNum load_seq_num);
20
21 void insertStore(Addr store_PC, InstSeqNum store_seq_num);
22
23 InstSeqNum checkInst(Addr PC);
24
25 void issued(Addr issued_PC, InstSeqNum issued_seq_num, bool is_store);
26
27 void squash(InstSeqNum squashed_num);
28
29 void clear();
30
31 private:
32 inline int calcIndex(Addr PC)
33 { return (PC >> offset_bits) & index_mask; }
34
35 inline SSID calcSSID(Addr PC)
36 { return ((PC ^ (PC >> 10)) % LFST_size); }
37
38 SSID *SSIT;
39
40 std::vector<bool> validSSIT;
41
42 InstSeqNum *LFST;
43
44 std::vector<bool> validLFST;
45
46 int *SSCounters;
47
48 int SSIT_size;
49
50 int LFST_size;
51
52 int index_mask;
53
54 // HACK: Hardcoded for now.
55 int offset_bits;
56 };
57
58 #endif // __STORE_SET_HH__