Merge zizzer:/bk/m5 into isabel.reinhardt.house:/z/stever/bk/m5
[gem5.git] / cpu / exetrace.cc
1 /*
2 * Copyright (c) 2003 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #include <fstream>
30 #include <iomanip>
31
32 #include "sim/param.hh"
33 #include "cpu/full_cpu/dyn_inst.hh"
34 #include "cpu/full_cpu/spec_state.hh"
35 #include "cpu/full_cpu/issue.hh"
36 #include "cpu/exetrace.hh"
37 #include "cpu/exec_context.hh"
38 #include "base/loader/symtab.hh"
39 #include "cpu/base_cpu.hh"
40 #include "cpu/static_inst.hh"
41
42 using namespace std;
43
44
45 ////////////////////////////////////////////////////////////////////////
46 //
47 // Methods for the InstRecord object
48 //
49
50
51 const SymbolTable *debugSymbolTable = NULL;
52
53 void
54 Trace::InstRecord::dump(ostream &outs)
55 {
56 if (flags[PRINT_CYCLE])
57 ccprintf(outs, "%7d: ", cycle);
58
59 outs << cpu->name() << " ";
60
61 if (flags[TRACE_MISSPEC])
62 outs << (misspeculating ? "-" : "+") << " ";
63
64 if (flags[PRINT_THREAD_NUM])
65 outs << "T" << thread << " : ";
66
67 outs << "0x" << hex << PC << " : ";
68
69 //
70 // Print decoded instruction
71 //
72
73 #if defined(__GNUC__) && (__GNUC__ < 3)
74 // There's a bug in gcc 2.x library that prevents setw()
75 // from working properly on strings
76 string mc(staticInst->disassemble(PC, debugSymbolTable));
77 while (mc.length() < 26)
78 mc += " ";
79 outs << mc;
80 #else
81 outs << setw(26) << left << staticInst->disassemble(PC, debugSymbolTable);
82 #endif
83
84 outs << " : ";
85
86 if (flags[PRINT_OP_CLASS]) {
87 outs << opClassStrings[staticInst->opClass()] << " : ";
88 }
89
90 if (flags[PRINT_RESULT_DATA] && data_status != DataInvalid) {
91 outs << " D=";
92 #if 0
93 if (data_status == DataDouble)
94 ccprintf(outs, "%f", data.as_double);
95 else
96 ccprintf(outs, "%#018x", data.as_int);
97 #else
98 ccprintf(outs, "%#018x", data.as_int);
99 #endif
100 }
101
102 if (flags[PRINT_EFF_ADDR] && addr_valid)
103 outs << " A=0x" << hex << addr;
104
105 if (flags[PRINT_INT_REGS] && regs_valid) {
106 for (int i = 0; i < 32;)
107 for (int j = i + 1; i <= j; i++)
108 ccprintf(outs, "r%02d = %#018x%s", i, iregs->regs[i],
109 ((i == j) ? "\n" : " "));
110 outs << "\n";
111 }
112
113 if (flags[PRINT_FETCH_SEQ] && fetch_seq_valid)
114 outs << " FetchSeq=" << dec << fetch_seq;
115
116 if (flags[PRINT_CP_SEQ] && cp_seq_valid)
117 outs << " CPSeq=" << dec << cp_seq;
118
119 //
120 // End of line...
121 //
122 outs << endl;
123 }
124
125
126 vector<bool> Trace::InstRecord::flags(NUM_BITS);
127
128 ////////////////////////////////////////////////////////////////////////
129 //
130 // Parameter space for per-cycle execution address tracing options.
131 // Derive from ParamContext so we can override checkParams() function.
132 //
133 class ExecutionTraceParamContext : public ParamContext
134 {
135 public:
136 ExecutionTraceParamContext(const string &_iniSection)
137 : ParamContext(_iniSection)
138 {
139 }
140
141 void checkParams(); // defined at bottom of file
142 };
143
144 ExecutionTraceParamContext exeTraceParams("exetrace");
145
146 Param<bool> exe_trace_spec(&exeTraceParams, "speculative",
147 "capture speculative instructions", false);
148
149 Param<bool> exe_trace_print_cycle(&exeTraceParams, "print_cycle",
150 "print cycle number", true);
151 Param<bool> exe_trace_print_opclass(&exeTraceParams, "print_opclass",
152 "print op class", true);
153 Param<bool> exe_trace_print_thread(&exeTraceParams, "print_thread",
154 "print thread number", true);
155 Param<bool> exe_trace_print_effaddr(&exeTraceParams, "print_effaddr",
156 "print effective address", true);
157 Param<bool> exe_trace_print_data(&exeTraceParams, "print_data",
158 "print result data", true);
159 Param<bool> exe_trace_print_iregs(&exeTraceParams, "print_iregs",
160 "print all integer regs", false);
161 Param<bool> exe_trace_print_fetchseq(&exeTraceParams, "print_fetchseq",
162 "print fetch sequence number", false);
163 Param<bool> exe_trace_print_cp_seq(&exeTraceParams, "print_cpseq",
164 "print correct-path sequence number", false);
165
166 //
167 // Helper function for ExecutionTraceParamContext::checkParams() just
168 // to get us into the InstRecord namespace
169 //
170 void
171 Trace::InstRecord::setParams()
172 {
173 flags[TRACE_MISSPEC] = exe_trace_spec;
174
175 flags[PRINT_CYCLE] = exe_trace_print_cycle;
176 flags[PRINT_OP_CLASS] = exe_trace_print_opclass;
177 flags[PRINT_THREAD_NUM] = exe_trace_print_thread;
178 flags[PRINT_RESULT_DATA] = exe_trace_print_effaddr;
179 flags[PRINT_EFF_ADDR] = exe_trace_print_data;
180 flags[PRINT_INT_REGS] = exe_trace_print_iregs;
181 flags[PRINT_FETCH_SEQ] = exe_trace_print_fetchseq;
182 flags[PRINT_CP_SEQ] = exe_trace_print_cp_seq;
183 }
184
185 void
186 ExecutionTraceParamContext::checkParams()
187 {
188 Trace::InstRecord::setParams();
189 }
190