Fix Lisa's CPU trace system check for syscall emulation.
[gem5.git] / cpu / exetrace.cc
1 /*
2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #include <fstream>
30 #include <iomanip>
31
32 #include "sim/param.hh"
33 #include "encumbered/cpu/full/dyn_inst.hh"
34 #include "encumbered/cpu/full/spec_state.hh"
35 #include "encumbered/cpu/full/issue.hh"
36 #include "cpu/exetrace.hh"
37 #include "cpu/exec_context.hh"
38 #include "base/loader/symtab.hh"
39 #include "cpu/base.hh"
40 #include "cpu/static_inst.hh"
41
42 using namespace std;
43
44
45 ////////////////////////////////////////////////////////////////////////
46 //
47 // Methods for the InstRecord object
48 //
49
50
51 void
52 Trace::InstRecord::dump(ostream &outs)
53 {
54 if (flags[INTEL_FORMAT]) {
55 #if FULL_SYSTEM
56 bool is_trace_system = (cpu->system->name() == trace_system);
57 #else
58 bool is_trace_system = true;
59 #endif
60 if (is_trace_system) {
61 ccprintf(outs, "%7d ) ", cycle);
62 outs << "0x" << hex << PC << ":\t";
63 if (staticInst->isLoad()) {
64 outs << "<RD 0x" << hex << addr;
65 outs << ">";
66 } else if (staticInst->isStore()) {
67 outs << "<WR 0x" << hex << addr;
68 outs << ">";
69 }
70 outs << endl;
71 }
72 } else {
73 if (flags[PRINT_CYCLE])
74 ccprintf(outs, "%7d: ", cycle);
75
76 outs << cpu->name() << " ";
77
78 if (flags[TRACE_MISSPEC])
79 outs << (misspeculating ? "-" : "+") << " ";
80
81 if (flags[PRINT_THREAD_NUM])
82 outs << "T" << thread << " : ";
83
84
85 std::string sym_str;
86 Addr sym_addr;
87 if (debugSymbolTable
88 && debugSymbolTable->findNearestSymbol(PC, sym_str, sym_addr)) {
89 if (PC != sym_addr)
90 sym_str += csprintf("+%d", PC - sym_addr);
91 outs << "@" << sym_str << " : ";
92 }
93 else {
94 outs << "0x" << hex << PC << " : ";
95 }
96
97 //
98 // Print decoded instruction
99 //
100
101 #if defined(__GNUC__) && (__GNUC__ < 3)
102 // There's a bug in gcc 2.x library that prevents setw()
103 // from working properly on strings
104 string mc(staticInst->disassemble(PC, debugSymbolTable));
105 while (mc.length() < 26)
106 mc += " ";
107 outs << mc;
108 #else
109 outs << setw(26) << left << staticInst->disassemble(PC, debugSymbolTable);
110 #endif
111
112 outs << " : ";
113
114 if (flags[PRINT_OP_CLASS]) {
115 outs << opClassStrings[staticInst->opClass()] << " : ";
116 }
117
118 if (flags[PRINT_RESULT_DATA] && data_status != DataInvalid) {
119 outs << " D=";
120 #if 0
121 if (data_status == DataDouble)
122 ccprintf(outs, "%f", data.as_double);
123 else
124 ccprintf(outs, "%#018x", data.as_int);
125 #else
126 ccprintf(outs, "%#018x", data.as_int);
127 #endif
128 }
129
130 if (flags[PRINT_EFF_ADDR] && addr_valid)
131 outs << " A=0x" << hex << addr;
132
133 if (flags[PRINT_INT_REGS] && regs_valid) {
134 for (int i = 0; i < 32;)
135 for (int j = i + 1; i <= j; i++)
136 ccprintf(outs, "r%02d = %#018x%s", i, iregs->regs[i],
137 ((i == j) ? "\n" : " "));
138 outs << "\n";
139 }
140
141 if (flags[PRINT_FETCH_SEQ] && fetch_seq_valid)
142 outs << " FetchSeq=" << dec << fetch_seq;
143
144 if (flags[PRINT_CP_SEQ] && cp_seq_valid)
145 outs << " CPSeq=" << dec << cp_seq;
146
147 //
148 // End of line...
149 //
150 outs << endl;
151 }
152 }
153
154
155 vector<bool> Trace::InstRecord::flags(NUM_BITS);
156 string Trace::InstRecord::trace_system;
157
158 ////////////////////////////////////////////////////////////////////////
159 //
160 // Parameter space for per-cycle execution address tracing options.
161 // Derive from ParamContext so we can override checkParams() function.
162 //
163 class ExecutionTraceParamContext : public ParamContext
164 {
165 public:
166 ExecutionTraceParamContext(const string &_iniSection)
167 : ParamContext(_iniSection)
168 {
169 }
170
171 void checkParams(); // defined at bottom of file
172 };
173
174 ExecutionTraceParamContext exeTraceParams("exetrace");
175
176 Param<bool> exe_trace_spec(&exeTraceParams, "speculative",
177 "capture speculative instructions", true);
178
179 Param<bool> exe_trace_print_cycle(&exeTraceParams, "print_cycle",
180 "print cycle number", true);
181 Param<bool> exe_trace_print_opclass(&exeTraceParams, "print_opclass",
182 "print op class", true);
183 Param<bool> exe_trace_print_thread(&exeTraceParams, "print_thread",
184 "print thread number", true);
185 Param<bool> exe_trace_print_effaddr(&exeTraceParams, "print_effaddr",
186 "print effective address", true);
187 Param<bool> exe_trace_print_data(&exeTraceParams, "print_data",
188 "print result data", true);
189 Param<bool> exe_trace_print_iregs(&exeTraceParams, "print_iregs",
190 "print all integer regs", false);
191 Param<bool> exe_trace_print_fetchseq(&exeTraceParams, "print_fetchseq",
192 "print fetch sequence number", false);
193 Param<bool> exe_trace_print_cp_seq(&exeTraceParams, "print_cpseq",
194 "print correct-path sequence number", false);
195 Param<bool> exe_trace_intel_format(&exeTraceParams, "intel_format",
196 "print trace in intel compatible format", false);
197 Param<string> exe_trace_system(&exeTraceParams, "trace_system",
198 "print trace of which system (client or server)",
199 "client");
200
201
202 //
203 // Helper function for ExecutionTraceParamContext::checkParams() just
204 // to get us into the InstRecord namespace
205 //
206 void
207 Trace::InstRecord::setParams()
208 {
209 flags[TRACE_MISSPEC] = exe_trace_spec;
210
211 flags[PRINT_CYCLE] = exe_trace_print_cycle;
212 flags[PRINT_OP_CLASS] = exe_trace_print_opclass;
213 flags[PRINT_THREAD_NUM] = exe_trace_print_thread;
214 flags[PRINT_RESULT_DATA] = exe_trace_print_effaddr;
215 flags[PRINT_EFF_ADDR] = exe_trace_print_data;
216 flags[PRINT_INT_REGS] = exe_trace_print_iregs;
217 flags[PRINT_FETCH_SEQ] = exe_trace_print_fetchseq;
218 flags[PRINT_CP_SEQ] = exe_trace_print_cp_seq;
219 flags[INTEL_FORMAT] = exe_trace_intel_format;
220 trace_system = exe_trace_system;
221 }
222
223 void
224 ExecutionTraceParamContext::checkParams()
225 {
226 Trace::InstRecord::setParams();
227 }
228