cpu/o3/rob_impl.hh

   1 /*
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  14  * this software without specific prior written permission.
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  28
  29 #ifndef __CPU_O3_CPU_ROB_IMPL_HH__
  30 #define __CPU_O3_CPU_ROB_IMPL_HH__
  31
  32 #include "config/full_system.hh"
  33 #include "cpu/o3/rob.hh"
  34
  35 template <class Impl>
  36 ROB<Impl>::ROB(unsigned _numEntries, unsigned _squashWidth)
  37     : numEntries(_numEntries),
  38       squashWidth(_squashWidth),
  39       numInstsInROB(0),
  40       squashedSeqNum(0)
  41 {
  42     doneSquashing = true;
  43 }
  44
  45 template <class Impl>
  46 void
  47 ROB<Impl>::setCPU(FullCPU *cpu_ptr)
  48 {
  49     cpu = cpu_ptr;
  50
  51     // Set the tail to the beginning of the CPU instruction list so that
  52     // upon the first instruction being inserted into the ROB, the tail
  53     // iterator can simply be incremented.
  54     tail = cpu->instList.begin();
  55
  56     // Set the squash iterator to the end of the instruction list.
  57     squashIt = cpu->instList.end();
  58 }
  59
  60 template <class Impl>
  61 int
  62 ROB<Impl>::countInsts()
  63 {
  64     // Start at 1; if the tail matches cpu->instList.begin(), then there is
  65     // one inst in the ROB.
  66     int return_val = 1;
  67
  68     // There are quite a few special cases.  Do not use this function other
  69     // than for debugging purposes.
  70     if (cpu->instList.begin() == cpu->instList.end()) {
  71         // In this case there are no instructions in the list.  The ROB
  72         // must be empty.
  73         return 0;
  74     } else if (tail == cpu->instList.end()) {
  75         // In this case, the tail is not yet pointing to anything valid.
  76         // The ROB must be empty.
  77         return 0;
  78     }
  79
  80     // Iterate through the ROB from the head to the tail, counting the
  81     // entries.
  82     for (InstIt_t i = cpu->instList.begin(); i != tail; ++i)
  83     {
  84         assert(i != cpu->instList.end());
  85         ++return_val;
  86     }
  87
  88     return return_val;
  89
  90     // Because the head won't be tracked properly until the ROB gets the
  91     // first instruction, and any time that the ROB is empty and has not
  92     // yet gotten the instruction, this function doesn't work.
  93 //    return numInstsInROB;
  94 }
  95
  96 template <class Impl>
  97 void
  98 ROB<Impl>::insertInst(DynInstPtr &inst)
  99 {
 100     // Make sure we have the right number of instructions.
 101     assert(numInstsInROB == countInsts());
 102     // Make sure the instruction is valid.
 103     assert(inst);
 104
 105     DPRINTF(ROB, "ROB: Adding inst PC %#x to the ROB.\n", inst->readPC());
 106
 107     // If the ROB is full then exit.
 108     assert(numInstsInROB != numEntries);
 109
 110     ++numInstsInROB;
 111
 112     // Increment the tail iterator, moving it one instruction back.
 113     // There is a special case if the ROB was empty prior to this insertion,
 114     // in which case the tail will be pointing at instList.end().  If that
 115     // happens, then reset the tail to the beginning of the list.
 116     if (tail != cpu->instList.end()) {
 117         ++tail;
 118     } else {
 119         tail = cpu->instList.begin();
 120     }
 121
 122     // Make sure the tail iterator is actually pointing at the instruction
 123     // added.
 124     assert((*tail) == inst);
 125
 126     DPRINTF(ROB, "ROB: Now has %d instructions.\n", numInstsInROB);
 127
 128 }
 129
 130 // Whatever calls this function needs to ensure that it properly frees up
 131 // registers prior to this function.
 132 template <class Impl>
 133 void
 134 ROB<Impl>::retireHead()
 135 {
 136     assert(numInstsInROB == countInsts());
 137     assert(numInstsInROB > 0);
 138
 139     // Get the head ROB instruction.
 140     DynInstPtr head_inst = cpu->instList.front();
 141
 142     // Make certain this can retire.
 143     assert(head_inst->readyToCommit());
 144
 145     DPRINTF(ROB, "ROB: Retiring head instruction of the ROB, "
 146             "instruction PC %#x, seq num %i\n", head_inst->readPC(),
 147             head_inst->seqNum);
 148
 149     // Keep track of how many instructions are in the ROB.
 150     --numInstsInROB;
 151
 152     // Tell CPU to remove the instruction from the list of instructions.
 153     // A special case is needed if the instruction being retired is the
 154     // only instruction in the ROB; otherwise the tail iterator will become
 155     // invalidated.
 156     cpu->removeFrontInst(head_inst);
 157
 158     if (numInstsInROB == 0) {
 159         tail = cpu->instList.end();
 160     }
 161 }
 162
 163 template <class Impl>
 164 bool
 165 ROB<Impl>::isHeadReady()
 166 {
 167     if (numInstsInROB != 0) {
 168         return cpu->instList.front()->readyToCommit();
 169     }
 170
 171     return false;
 172 }
 173
 174 template <class Impl>
 175 unsigned
 176 ROB<Impl>::numFreeEntries()
 177 {
 178     assert(numInstsInROB == countInsts());
 179
 180     return numEntries - numInstsInROB;
 181 }
 182
 183 template <class Impl>
 184 void
 185 ROB<Impl>::doSquash()
 186 {
 187     DPRINTF(ROB, "ROB: Squashing instructions.\n");
 188
 189     assert(squashIt != cpu->instList.end());
 190
 191     for (int numSquashed = 0;
 192          numSquashed < squashWidth && (*squashIt)->seqNum != squashedSeqNum;
 193          ++numSquashed)
 194     {
 195         // Ensure that the instruction is younger.
 196         assert((*squashIt)->seqNum > squashedSeqNum);
 197
 198         DPRINTF(ROB, "ROB: Squashing instruction PC %#x, seq num %i.\n",
 199                 (*squashIt)->readPC(), (*squashIt)->seqNum);
 200
 201         // Mark the instruction as squashed, and ready to commit so that
 202         // it can drain out of the pipeline.
 203         (*squashIt)->setSquashed();
 204
 205         (*squashIt)->setCanCommit();
 206
 207         // Special case for when squashing due to a syscall.  It's possible
 208         // that the squash happened after the head instruction was already
 209         // committed, meaning that (*squashIt)->seqNum != squashedSeqNum
 210         // will never be false.  Normally the squash would never be able
 211         // to go past the head of the ROB; in this case it might, so it
 212         // must be handled otherwise it will segfault.
 213 #if !FULL_SYSTEM
 214         if (squashIt == cpu->instList.begin()) {
 215             DPRINTF(ROB, "ROB: Reached head of instruction list while "
 216                     "squashing.\n");
 217
 218             squashIt = cpu->instList.end();
 219
 220             doneSquashing = true;
 221
 222             return;
 223         }
 224 #endif
 225
 226         // Move the tail iterator to the next instruction.
 227         squashIt--;
 228     }
 229
 230
 231     // Check if ROB is done squashing.
 232     if ((*squashIt)->seqNum == squashedSeqNum) {
 233         DPRINTF(ROB, "ROB: Done squashing instructions.\n");
 234
 235         squashIt = cpu->instList.end();
 236
 237         doneSquashing = true;
 238     }
 239 }
 240
 241 template <class Impl>
 242 void
 243 ROB<Impl>::squash(InstSeqNum squash_num)
 244 {
 245     DPRINTF(ROB, "ROB: Starting to squash within the ROB.\n");
 246     doneSquashing = false;
 247
 248     squashedSeqNum = squash_num;
 249
 250     assert(tail != cpu->instList.end());
 251
 252     squashIt = tail;
 253
 254     doSquash();
 255 }
 256
 257 template <class Impl>
 258 uint64_t
 259 ROB<Impl>::readHeadPC()
 260 {
 261     assert(numInstsInROB == countInsts());
 262
 263     DynInstPtr head_inst = cpu->instList.front();
 264
 265     return head_inst->readPC();
 266 }
 267
 268 template <class Impl>
 269 uint64_t
 270 ROB<Impl>::readHeadNextPC()
 271 {
 272     assert(numInstsInROB == countInsts());
 273
 274     DynInstPtr head_inst = cpu->instList.front();
 275
 276     return head_inst->readNextPC();
 277 }
 278
 279 template <class Impl>
 280 InstSeqNum
 281 ROB<Impl>::readHeadSeqNum()
 282 {
 283     // Return the last sequence number that has not been squashed.  Other
 284     // stages can use it to squash any instructions younger than the current
 285     // tail.
 286     DynInstPtr head_inst = cpu->instList.front();
 287
 288     return head_inst->seqNum;
 289 }
 290
 291 template <class Impl>
 292 uint64_t
 293 ROB<Impl>::readTailPC()
 294 {
 295     assert(numInstsInROB == countInsts());
 296
 297     assert(tail != cpu->instList.end());
 298
 299     return (*tail)->readPC();
 300 }
 301
 302 template <class Impl>
 303 InstSeqNum
 304 ROB<Impl>::readTailSeqNum()
 305 {
 306     // Return the last sequence number that has not been squashed.  Other
 307     // stages can use it to squash any instructions younger than the current
 308     // tail.
 309     return (*tail)->seqNum;
 310 }
 311
 312 #endif // __CPU_O3_CPU_ROB_IMPL_HH__