Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5
[gem5.git] / cpu / ozone / ea_list.hh
1 /*
2 * Copyright (c) 2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #ifndef __CPU_EA_LIST_HH__
30 #define __CPU_EA_LIST_HH__
31
32 #include <list>
33 #include <utility>
34
35 #include "arch/alpha/isa_traits.hh"
36 #include "cpu/inst_seq.hh"
37
38 /**
39 * Simple class to hold onto a list of pairs, each pair having a memory
40 * instruction's sequence number and effective addr. This list can be used
41 * for memory disambiguation. However, if I ever want to forward results, I
42 * may have to use a list that holds DynInstPtrs. Hence this may change in
43 * the future.
44 */
45 class EAList {
46 private:
47 typedef std::pair<InstSeqNum, Addr> instEA;
48 typedef std::list<instEA>::iterator eaListIt;
49 typedef std::list<instEA>::const_iterator constEAListIt;
50
51 std::list<instEA> eaList;
52
53 public:
54 EAList() { }
55 ~EAList() { }
56
57 void addAddr(const InstSeqNum &new_sn, const Addr &new_ea);
58
59 void clearAddr(const InstSeqNum &sn_to_clear, const Addr &ea_to_clear);
60
61 /** Checks if any instructions older than check_sn have a conflicting
62 * address with check_ea. Note that this function does not handle the
63 * sequence number rolling over.
64 */
65 bool checkConflict(const InstSeqNum &check_sn, const Addr &check_ea) const;
66
67 void clear();
68
69 void commit(const InstSeqNum &commit_sn);
70 };
71
72 #endif // __CPU_EA_LIST_HH__