Update tracing functionality and add an ITX trace writer.
[gem5.git] / cpu / trace / trace_cpu.hh
1 /*
2 * Copyright (c) 2004 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 /**
30 * @file
31 * Declaration of a memory trace CPU object. Uses a memory trace to drive the
32 * provided memory hierarchy.
33 */
34
35 #ifndef __TRACE_CPU_HH__
36 #define __TRACE_CPU_HH__
37
38 #include <string>
39
40 #include "cpu/base_cpu.hh"
41 #include "mem/mem_req.hh" // for MemReqPtr
42 #include "sim/eventq.hh" // for Event
43
44 // Forward declaration.
45 class MemInterface;
46 class MemTraceReader;
47
48 /**
49 * A cpu object for running memory traces through a memory hierarchy.
50 */
51 class TraceCPU : public BaseCPU
52 {
53 /** Interface for instruction trace requests, if any. */
54 MemInterface *icacheInterface;
55 /** Interface for data trace requests, if any. */
56 MemInterface *dcacheInterface;
57
58 /** Data reference trace. */
59 MemTraceReader *dataTrace;
60
61 /** Number of outstanding requests. */
62 int outstandingRequests;
63
64 /** Cycle of the next request, 0 if not available. */
65 Tick nextCycle;
66
67 /** Next request. */
68 MemReqPtr nextReq;
69
70 /**
71 * Event to call the TraceCPU::tick
72 */
73 class TickEvent : public Event
74 {
75 private:
76 /** The associated CPU */
77 TraceCPU *cpu;
78
79 public:
80 /**
81 * Construct this event;
82 */
83 TickEvent(TraceCPU *c);
84
85 /**
86 * Call the tick function.
87 */
88 void process();
89
90 /**
91 * Return a string description of this event.
92 */
93 const char *description();
94 };
95
96 TickEvent tickEvent;
97
98 public:
99 /**
100 * Construct a TraceCPU object.
101 */
102 TraceCPU(const std::string &name,
103 MemInterface *icache_interface,
104 MemInterface *dcache_interface,
105 MemTraceReader *data_trace);
106
107 /**
108 * Perform all the accesses for one cycle.
109 */
110 void tick();
111
112 /**
113 * Handle a completed memory request.
114 */
115 void completeRequest(MemReqPtr &req);
116 };
117
118 class TraceCompleteEvent : public Event
119 {
120 MemReqPtr req;
121 TraceCPU *tester;
122
123 public:
124
125 TraceCompleteEvent(MemReqPtr &_req, TraceCPU *_tester)
126 : Event(&mainEventQueue), req(_req), tester(_tester)
127 {
128 setFlags(AutoDelete);
129 }
130
131 void process();
132
133 virtual const char *description();
134 };
135
136 #endif //__TRACE_CPU_HH__
137