Clean up CPU stuff and make it use params structs
[gem5.git] / cpu / trace / trace_cpu.hh
1 /*
2 * Copyright (c) 2004 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 /**
30 * @file
31 * Declaration of a memory trace CPU object. Uses a memory trace to drive the
32 * provided memory hierarchy.
33 */
34
35 #ifndef __CPU_TRACE_TRACE_CPU_HH__
36 #define __CPU_TRACE_TRACE_CPU_HH__
37
38 #include <string>
39
40 #include "mem/mem_req.hh" // for MemReqPtr
41 #include "sim/eventq.hh" // for Event
42 #include "sim/sim_object.hh"
43
44 // Forward declaration.
45 class MemInterface;
46 class MemTraceReader;
47
48 /**
49 * A cpu object for running memory traces through a memory hierarchy.
50 */
51 class TraceCPU : public SimObject
52 {
53 private:
54 /** Interface for instruction trace requests, if any. */
55 MemInterface *icacheInterface;
56 /** Interface for data trace requests, if any. */
57 MemInterface *dcacheInterface;
58
59 /** Data reference trace. */
60 MemTraceReader *dataTrace;
61
62 /** Number of outstanding requests. */
63 int outstandingRequests;
64
65 /** Cycle of the next request, 0 if not available. */
66 Tick nextCycle;
67
68 /** Next request. */
69 MemReqPtr nextReq;
70
71 /**
72 * Event to call the TraceCPU::tick
73 */
74 class TickEvent : public Event
75 {
76 private:
77 /** The associated CPU */
78 TraceCPU *cpu;
79
80 public:
81 /**
82 * Construct this event;
83 */
84 TickEvent(TraceCPU *c);
85
86 /**
87 * Call the tick function.
88 */
89 void process();
90
91 /**
92 * Return a string description of this event.
93 */
94 const char *description();
95 };
96
97 TickEvent tickEvent;
98
99 public:
100 /**
101 * Construct a TraceCPU object.
102 */
103 TraceCPU(const std::string &name,
104 MemInterface *icache_interface,
105 MemInterface *dcache_interface,
106 MemTraceReader *data_trace);
107
108 /**
109 * Perform all the accesses for one cycle.
110 */
111 void tick();
112
113 /**
114 * Handle a completed memory request.
115 */
116 void completeRequest(MemReqPtr &req);
117 };
118
119 class TraceCompleteEvent : public Event
120 {
121 MemReqPtr req;
122 TraceCPU *tester;
123
124 public:
125
126 TraceCompleteEvent(MemReqPtr &_req, TraceCPU *_tester)
127 : Event(&mainEventQueue), req(_req), tester(_tester)
128 {
129 setFlags(AutoDelete);
130 }
131
132 void process();
133
134 virtual const char *description();
135 };
136
137 #endif // __CPU_TRACE_TRACE_CPU_HH__
138