2 auto-generated by [[pinouts.py]]
7 ## Bank N (64 pins, width 2)
9 | Pin | Mux0 | Mux1 | Mux2 | Mux3 |
10 | --- | ----------- | ----------- | ----------- | ----------- |
47 | 60 | N SYS_PLLCLK | |
48 | 61 | N SYS_PLLSELA0 | |
49 | 62 | N SYS_PLLSELA1 | |
50 | 63 | N SYS_PLLTESTOUT | |
52 ## Bank E (64 pins, width 2)
54 | Pin | Mux0 | Mux1 | Mux2 | Mux3 |
55 | --- | ----------- | ----------- | ----------- | ----------- |
58 | 66 | E RG2_ERXD0 | |
59 | 67 | E RG2_ERXD1 | |
60 | 68 | E RG2_ERXD2 | |
61 | 69 | E RG2_ERXD3 | |
62 | 70 | E RG2_ETXD0 | |
63 | 71 | E RG2_ETXD1 | |
64 | 72 | E RG2_ETXD2 | |
65 | 73 | E RG2_ETXD3 | |
66 | 74 | E RG2_ERXCK | |
67 | 75 | E RG2_ERXERR | |
68 | 76 | E RG2_ERXDV | |
70 | 78 | E RG2_EMDIO | |
71 | 79 | E RG2_ETXEN | |
72 | 80 | E RG2_ETXCK | |
75 | 83 | E RG2_ETXERR | |
78 | 86 | E RG1_ERXD0 | |
79 | 87 | E RG1_ERXD1 | |
80 | 88 | E RG1_ERXD2 | |
81 | 89 | E RG1_ERXD3 | |
82 | 90 | E RG1_ETXD0 | |
83 | 91 | E RG1_ETXD1 | |
84 | 92 | E RG1_ETXD2 | |
85 | 93 | E RG1_ETXD3 | |
86 | 94 | E RG1_ERXCK | |
87 | 95 | E RG1_ERXERR | |
88 | 96 | E RG1_ERXDV | |
90 | 98 | E RG1_EMDIO | |
91 | 99 | E RG1_ETXEN | |
92 | 100 | E RG1_ETXCK | |
93 | 101 | E RG1_ECRS | |
94 | 102 | E RG1_ECOL | |
95 | 103 | E RG1_ETXERR | |
98 | 106 | E RG0_ERXD0 | |
99 | 107 | E RG0_ERXD1 | |
100 | 108 | E RG0_ERXD2 | |
101 | 109 | E RG0_ERXD3 | |
102 | 110 | E RG0_ETXD0 | |
103 | 111 | E RG0_ETXD1 | |
104 | 112 | E RG0_ETXD2 | |
105 | 113 | E RG0_ETXD3 | |
106 | 114 | E RG0_ERXCK | |
107 | 115 | E RG0_ERXERR | |
108 | 116 | E RG0_ERXDV | |
109 | 117 | E RG0_EMDC | |
110 | 118 | E RG0_EMDIO | |
111 | 119 | E RG0_ETXEN | |
112 | 120 | E RG0_ETXCK | |
113 | 121 | E RG0_ECRS | |
114 | 122 | E RG0_ECOL | |
115 | 123 | E RG0_ETXERR | |
118 | 127 | E SYS_PLLVCOUT | |
120 ## Bank S (64 pins, width 2)
122 | Pin | Mux0 | Mux1 | Mux2 | Mux3 |
123 | --- | ----------- | ----------- | ----------- | ----------- |
128 | 152 | S RG4_ERXD0 | |
129 | 153 | S RG4_ERXD1 | |
130 | 154 | S RG4_ERXD2 | |
131 | 155 | S RG4_ERXD3 | |
132 | 156 | S RG4_ETXD0 | |
133 | 157 | S RG4_ETXD1 | |
134 | 158 | S RG4_ETXD2 | |
135 | 159 | S RG4_ETXD3 | |
136 | 160 | S RG4_ERXCK | |
137 | 161 | S RG4_ERXERR | |
138 | 162 | S RG4_ERXDV | |
139 | 163 | S RG4_EMDC | |
140 | 164 | S RG4_EMDIO | |
141 | 165 | S RG4_ETXEN | |
142 | 166 | S RG4_ETXCK | |
143 | 167 | S RG4_ECRS | |
144 | 168 | S RG4_ECOL | |
145 | 169 | S RG4_ETXERR | |
146 | 172 | S RG3_ERXD0 | |
147 | 173 | S RG3_ERXD1 | |
148 | 174 | S RG3_ERXD2 | |
149 | 175 | S RG3_ERXD3 | |
150 | 176 | S RG3_ETXD0 | |
151 | 177 | S RG3_ETXD1 | |
152 | 178 | S RG3_ETXD2 | |
153 | 179 | S RG3_ETXD3 | |
154 | 180 | S RG3_ERXCK | |
155 | 181 | S RG3_ERXERR | |
156 | 182 | S RG3_ERXDV | |
157 | 183 | S RG3_EMDC | |
158 | 184 | S RG3_EMDIO | |
159 | 185 | S RG3_ETXEN | |
160 | 186 | S RG3_ETXCK | |
161 | 187 | S RG3_ECRS | |
162 | 188 | S RG3_ECOL | |
163 | 189 | S RG3_ETXERR | |
165 ## Bank W (64 pins, width 2)
167 | Pin | Mux0 | Mux1 | Mux2 | Mux3 |
168 | --- | ----------- | ----------- | ----------- | ----------- |
173 | 196 | W ULPI0_CK | |
174 | 197 | W ULPI0_DIR | |
175 | 198 | W ULPI0_STP | |
176 | 199 | W ULPI0_NXT | |
177 | 200 | W ULPI0_D0 | |
178 | 201 | W ULPI0_D1 | |
179 | 202 | W ULPI0_D2 | |
180 | 203 | W ULPI0_D3 | |
181 | 204 | W ULPI0_D4 | |
182 | 205 | W ULPI0_D5 | |
183 | 206 | W ULPI0_D6 | |
184 | 207 | W ULPI0_D7 | |
187 | 210 | W ULPI1_CK | |
188 | 211 | W ULPI1_DIR | |
189 | 212 | W ULPI1_STP | |
190 | 213 | W ULPI1_NXT | |
191 | 214 | W ULPI1_D0 | |
192 | 215 | W ULPI1_D1 | |
193 | 216 | W ULPI1_D2 | |
194 | 217 | W ULPI1_D3 | |
195 | 218 | W ULPI1_D4 | |
196 | 219 | W ULPI1_D5 | |
197 | 220 | W ULPI1_D6 | |
198 | 221 | W ULPI1_D7 | |
201 | 224 | W UART0_TX | |
202 | 225 | W UART0_RX | |
210 | 236 | W GPIOW_W0 | |
211 | 237 | W GPIOW_W1 | |
212 | 238 | W GPIOW_W2 | |
213 | 239 | W GPIOW_W3 | |
214 | 240 | W GPIOW_W4 | |
215 | 241 | W GPIOW_W5 | |
216 | 242 | W GPIOW_W6 | |
217 | 243 | W GPIOW_W7 | |
218 | 244 | W GPIOW_W8 | |
219 | 245 | W GPIOW_W9 | |
220 | 246 | W GPIOW_W10 | |
221 | 247 | W GPIOW_W11 | |
222 | 248 | W GPIOW_W12 | |
223 | 249 | W GPIOW_W13 | |
224 | 250 | W GPIOW_W14 | |
225 | 251 | W GPIOW_W15 | |
231 # Pinouts (Fixed function)
235 auto-generated by [[pinouts.py]]
418 * SYS_PLLSELA0 : N61/0
419 * SYS_PLLSELA1 : N62/0
420 * SYS_PLLTESTOUT : N63/0
421 * SYS_PLLVCOUT : E63/0
469 * VDDE_0 : W2/0 E1/0 N1/0 N57/0
471 * VDDE_2 : W42/0 S4/0
473 * VDDE_4 : E21/0 E41/0
474 * VDDI_0 : W0/0 N2/0 N55/0
476 * VDDI_2 : W34/0 S6/0
484 * VSSE_0 : W3/0 E0/0 N0/0 N56/0
486 * VSSE_2 : W43/0 S5/0
488 * VSSE_4 : E20/0 E40/0
489 * VSSI_0 : W1/0 N3/0 N54/0
491 * VSSI_2 : W35/0 S7/0
495 # Pinmap for NGI ROUTER Libre-SOC 180nm
499 * RG0_ERXD0 106 E42/0
500 * RG0_ERXD1 107 E43/0
501 * RG0_ERXD2 108 E44/0
502 * RG0_ERXD3 109 E45/0
503 * RG0_ETXD0 110 E46/0
504 * RG0_ETXD1 111 E47/0
505 * RG0_ETXD2 112 E48/0
506 * RG0_ETXD3 113 E49/0
507 * RG0_ERXCK 114 E50/0
508 * RG0_ERXERR 115 E51/0
509 * RG0_ERXDV 116 E52/0
511 * RG0_EMDIO 118 E54/0
512 * RG0_ETXEN 119 E55/0
513 * RG0_ETXCK 120 E56/0
516 * RG0_ETXERR 123 E59/0
529 * RG1_ERXERR 95 E31/0
534 * RG1_ETXCK 100 E36/0
537 * RG1_ETXERR 103 E39/0
550 * RG2_ERXERR 75 E11/0
558 * RG2_ETXERR 83 E19/0
562 * RG3_ERXD0 172 S44/0
563 * RG3_ERXD1 173 S45/0
564 * RG3_ERXD2 174 S46/0
565 * RG3_ERXD3 175 S47/0
566 * RG3_ETXD0 176 S48/0
567 * RG3_ETXD1 177 S49/0
568 * RG3_ETXD2 178 S50/0
569 * RG3_ETXD3 179 S51/0
570 * RG3_ERXCK 180 S52/0
571 * RG3_ERXERR 181 S53/0
572 * RG3_ERXDV 182 S54/0
574 * RG3_EMDIO 184 S56/0
575 * RG3_ETXEN 185 S57/0
576 * RG3_ETXCK 186 S58/0
579 * RG3_ETXERR 189 S61/0
583 * RG4_ERXD0 152 S24/0
584 * RG4_ERXD1 153 S25/0
585 * RG4_ERXD2 154 S26/0
586 * RG4_ERXD3 155 S27/0
587 * RG4_ETXD0 156 S28/0
588 * RG4_ETXD1 157 S29/0
589 * RG4_ETXD2 158 S30/0
590 * RG4_ETXD3 159 S31/0
591 * RG4_ERXCK 160 S32/0
592 * RG4_ERXERR 161 S33/0
593 * RG4_ERXDV 162 S34/0
595 * RG4_EMDIO 164 S36/0
596 * RG4_ETXEN 165 S37/0
597 * RG4_ETXCK 166 S38/0
600 * RG4_ETXERR 169 S41/0
683 * SYS_PLLCLK 60 N60/0
684 * SYS_PLLSELA0 61 N61/0
685 * SYS_PLLSELA1 62 N62/0
686 * SYS_PLLTESTOUT 63 N63/0
687 * SYS_PLLVCOUT 127 E63/0
710 * GPIOW_W10 246 W54/0
711 * GPIOW_W11 247 W55/0
712 * GPIOW_W12 248 W56/0
713 * GPIOW_W13 249 W57/0
714 * GPIOW_W14 250 W58/0
715 * GPIOW_W15 251 W59/0
728 user-facing: internal (on Card), multiplexed with JTAG
729 and UART2, for debug purposes
732 ## Unused Pinouts (spare as GPIO) for 'NGI ROUTER Libre-SOC 180nm'
734 | Pin | Mux0 | Mux1 | Mux2 | Mux3 |
735 | --- | ----------- | ----------- | ----------- | ----------- |
736 | 54 | N VSSI_0 | | | |
737 | 55 | N VDDI_0 | | | |
738 | 56 | N VSSE_0 | | | |
739 | 57 | N VDDE_0 | | | |
740 | 64 | E VSSE_0 | | | |
741 | 65 | E VDDE_0 | | | |
742 | 104 | E VSSE_4 | | | |
743 | 105 | E VDDE_4 | | | |
744 | 134 | S VDDI_2 | | | |
745 | 135 | S VSSI_2 | | | |
746 | 192 | W VDDI_0 | | | |
747 | 193 | W VSSI_0 | | | |
748 | 194 | W VDDE_0 | | | |
749 | 195 | W VSSE_0 | | | |
750 | 208 | W VDDI_1 | | | |
751 | 209 | W VSSI_1 | | | |
752 | 210 | W ULPI1_CK | | | |
753 | 211 | W ULPI1_DIR | | | |
754 | 212 | W ULPI1_STP | | | |
755 | 213 | W ULPI1_NXT | | | |
756 | 214 | W ULPI1_D0 | | | |
757 | 215 | W ULPI1_D1 | | | |
758 | 216 | W ULPI1_D2 | | | |
759 | 217 | W ULPI1_D3 | | | |
760 | 218 | W ULPI1_D4 | | | |
761 | 219 | W ULPI1_D5 | | | |
762 | 220 | W ULPI1_D6 | | | |
763 | 221 | W ULPI1_D7 | | | |
764 | 222 | W VDDE_1 | | | |
765 | 223 | W VSSE_1 | | | |
766 | 226 | W VDDI_2 | | | |
767 | 227 | W VSSI_2 | | | |
768 | 234 | W VDDE_2 | | | |
769 | 235 | W VSSE_2 | | | |
770 | 252 | W VDDI_3 | | | |
771 | 253 | W VSSI_3 | | | |
772 | 254 | W VDDE_3 | | | |
773 | 255 | W VSSE_3 | | | |
775 # Reference Datasheets
777 datasheets and pinout links
778 * <https://ftp.libre-soc.org/STULPI01BTBR.en.CD00201527.pdf>
779 * <https://ftp.libre-soc.org/3300db.pdf>
780 * <https://ftp.libre-soc.org/1912111437_Realtek-Semicon-RTL8211F-CG_C187932.pdf>
782 * <http://datasheets.chipdb.org/AMD/8018x/80186/amd-80186.pdf>
783 * <http://hands.com/~lkcl/eoma/shenzen/frida/FRD144A2701.pdf>
784 * <http://pinouts.ru/Memory/sdcard_pinout.shtml>
785 * p8 <http://www.onfi.org/~/media/onfi/specs/onfi_2_0_gold.pdf?la=en>
786 * <https://www.heyrick.co.uk/blog/files/datasheets/dm9000aep.pdf>
787 * <http://cache.freescale.com/files/microcontrollers/doc/app_note/AN4393.pdf>
788 * <https://www.nxp.com/docs/en/data-sheet/MCF54418.pdf>
789 * ULPI OTG PHY, ST <http://www.st.com/en/interfaces-and-transceivers/stulpi01a.html>
790 * ULPI OTG PHY, TI TUSB1210 <http://ti.com/product/TUSB1210/>
792 # Pin Bank starting points and lengths