add auto-generated ngi_router.mdwn from pinmux.py
[libreriscv.git] / crypto_router_pinmux.mdwn
1 # NGI POINTER Gigabit Ethernet Router Pinmux
2
3 * NLnet page: [[nlnet_2021_crypto_router]]
4 * bugreport: <https://bugs.libre-soc.org/show_bug.cgi?id=739>
5 * Top-level bugreport: <https://bugs.libre-soc.org/show_bug.cgi?id=589>
6 * ls180 packaging: <https://bugs.libre-soc.org/show_bug.cgi?id=508>
7 * Main page: [[crypto_router_asic]]
8 * Package Selection page: <https://www.greatek.com.tw/product6-en.html>
9 * Source code: <https://git.libre-soc.org/?p=pinmux.git;a=blob;f=src/spec/ngi_router.py;hb=HEAD>
10
11 # Expected Package
12
13 * QFP 256 pin?
14 * Largest option from Greatek: LQFP-256-0.4mm
15 - LQFP
16 - 28x28mm size
17 - 256 pins
18 - 0.4mm pitch
19 - 1.0mm lead length
20 - body height 1.4mm
21
22 # Functionality and Pincount (NOT FINAL, LIKELY TO CHANGE):
23
24 Essential:
25
26 * 5x RGMII Ethernet - 5x18 = 90 pins [[shakti/m_class/RGMII/]]
27 * 2x USB ULPI - 2x12 = 24 pins [[shakti/m_class/ULPI/]]
28 * SDRAM - 39 pins [[shakti/m_class/sdram/]]
29 * UART - 2 pins
30 * JTAG - 4 pins [[shakti/m_class/JTAG/]]
31 * 1.8v Core Power Vdd - 13 pins
32 * 1.8v Core Power Vss - 13 pins
33 * 3.3v IO Power Vdd - 10 pins
34 * 3.3v IO Power Vss - 10 pins
35 * Reset - 1 pin
36 * PLL - 5 pins
37 * SPI - 4 pins [[shakti/m_class/SPI/]]
38
39 non-essential:
40
41 * GPIO - 16 pins
42 * EINT - 3 pins
43 * I2C - 2 pins
44 * QSPI - Could share with SPI - 6 pins [[shakti/m_class/QSPI/]]
45 * SD/MMC - Could share with SPI - 4 pins
46
47 Total: **246** pins (10 spare)
48
49 GPIO, EINT, Vdd, Vss, SDRAM, reset, PLL pin counts come from the LS180 pinmux definitions.
50
51 RGMII pinout count comes from [here](https://web.pa.msu.edu/hep/atlas/l1calo/hub/hardware/components/micrel/rgmii_specification_hp_v1.3_dec_2000.pdf)
52
53 # SVG image
54
55 [[!img ngi_router.svg size=640x ]]