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[libreriscv.git] / crypto_router_pinmux.mdwn
1 # NGI POINTER Gigabit Ethernet Router Pinmux
2
3 * NLnet page: [[nlnet_2021_crypto_router]]
4 * Top-level bugreport: <https://bugs.libre-soc.org/show_bug.cgi?id=589>
5 * Main page: [[crypto_router_asic]]
6
7 # Expected Package
8 * QFP 200 pin?
9
10 # Functionality and Pincount (NOT FINAL, LIKELY TO CHANGE):
11
12 Essential:
13
14 * 5x RGMII Ethernet - 5x20 = 100 pins [[shakti/m_class/RGMII/]]
15 * 2x USB ULPI - 2x12 = 24 pins [[shakti/m_class/ULPI/]]
16 * SDRAM - 39 pins [[shakti/m_class/sdram/]]
17 * UART - 2 pins
18 * JTAG - 4 pins [[shakti/m_class/JTAG/]]
19 * 1.8v Core Power Vdd - 13 pins
20 * 1.8v Core Power Vss - 13 pins
21 * 3.3v IO Power Vdd - 10 pins
22 * 3.3v IO Power Vss - 10 pins
23 * Reset - 1 pin
24 * PLL - 5 pins
25 * SPI - 4 pins [[shakti/m_class/SPI/]]
26
27 non-essential:
28
29 * GPIO - 16 pins
30 * EINT - 3 pins
31 * I2C - 2 pins
32 * QSPI - Could share with SPI - 6 pins [[shakti/m_class/QSPI/]]
33 * SD/MMC - Could share with SPI - 4 pins
34
35 Total: **256** pins
36
37 GPIO, EINT, Vdd, Vss, SDRAM, reset, PLL pin counts come from the LS180 pinmux definitions.
38
39 RGMII pinout count comes from [here](https://web.pa.msu.edu/hep/atlas/l1calo/hub/hardware/components/micrel/rgmii_specification_hp_v1.3_dec_2000.pdf)