13 from testlib
import assertEqual
, assertNotEqual
, assertIn
, assertNotIn
14 from testlib
import assertGreater
, assertRegexpMatches
, assertLess
15 from testlib
import GdbTest
, GdbSingleHartTest
, TestFailed
, assertTrue
17 MSTATUS_UIE
= 0x00000001
18 MSTATUS_SIE
= 0x00000002
19 MSTATUS_HIE
= 0x00000004
20 MSTATUS_MIE
= 0x00000008
21 MSTATUS_UPIE
= 0x00000010
22 MSTATUS_SPIE
= 0x00000020
23 MSTATUS_HPIE
= 0x00000040
24 MSTATUS_MPIE
= 0x00000080
25 MSTATUS_SPP
= 0x00000100
26 MSTATUS_HPP
= 0x00000600
27 MSTATUS_MPP
= 0x00001800
28 MSTATUS_FS
= 0x00006000
29 MSTATUS_XS
= 0x00018000
30 MSTATUS_MPRV
= 0x00020000
31 MSTATUS_PUM
= 0x00040000
32 MSTATUS_MXR
= 0x00080000
33 MSTATUS_VM
= 0x1F000000
34 MSTATUS32_SD
= 0x80000000
35 MSTATUS64_SD
= 0x8000000000000000
37 # pylint: disable=abstract-method
39 def ihex_line(address
, record_type
, data
):
40 assert len(data
) < 128
41 line
= ":%02X%04X%02X" % (len(data
), address
, record_type
)
43 check
+= address
% 256
49 line
+= "%02X" % value
50 line
+= "%02X\n" % ((256-check
)%256)
54 assert line
.startswith(":")
56 data_len
= int(line
[:2], 16)
57 address
= int(line
[2:6], 16)
58 record_type
= int(line
[6:8], 16)
60 for i
in range(data_len
):
61 data
+= "%c" % int(line
[8+2*i
:10+2*i
], 16)
62 return record_type
, address
, data
64 def readable_binary_string(s
):
65 return "".join("%02x" % ord(c
) for c
in s
)
67 class SimpleRegisterTest(GdbTest
):
68 def check_reg(self
, name
):
69 a
= random
.randrange(1<<self
.hart
.xlen
)
70 b
= random
.randrange(1<<self
.hart
.xlen
)
71 self
.gdb
.p("$%s=0x%x" % (name
, a
))
73 assertEqual(self
.gdb
.p("$%s" % name
), a
)
74 self
.gdb
.p("$%s=0x%x" % (name
, b
))
76 assertEqual(self
.gdb
.p("$%s" % name
), b
)
80 self
.gdb
.command("p *((int*) 0x%x)=0x13" % self
.hart
.ram
)
81 self
.gdb
.command("p *((int*) 0x%x)=0x13" % (self
.hart
.ram
+ 4))
82 self
.gdb
.command("p *((int*) 0x%x)=0x13" % (self
.hart
.ram
+ 8))
83 self
.gdb
.command("p *((int*) 0x%x)=0x13" % (self
.hart
.ram
+ 12))
84 self
.gdb
.command("p *((int*) 0x%x)=0x13" % (self
.hart
.ram
+ 16))
85 self
.gdb
.p("$pc=0x%x" % self
.hart
.ram
)
87 class SimpleS0Test(SimpleRegisterTest
):
91 class SimpleS1Test(SimpleRegisterTest
):
95 class SimpleT0Test(SimpleRegisterTest
):
99 class SimpleT1Test(SimpleRegisterTest
):
103 class SimpleF18Test(SimpleRegisterTest
):
104 def check_reg(self
, name
):
105 self
.gdb
.p_raw("$mstatus=$mstatus | 0x00006000")
109 self
.gdb
.p_raw("$%s=%f" % (name
, a
))
111 assertLess(abs(float(self
.gdb
.p_raw("$%s" % name
)) - a
), .001)
112 self
.gdb
.p_raw("$%s=%f" % (name
, b
))
114 assertLess(abs(float(self
.gdb
.p_raw("$%s" % name
)) - b
), .001)
116 def early_applicable(self
):
117 return self
.hart
.extensionSupported('F')
120 self
.check_reg("f18")
122 class SimpleMemoryTest(GdbTest
):
123 def access_test(self
, size
, data_type
):
124 assertEqual(self
.gdb
.p("sizeof(%s)" % data_type
), size
)
125 a
= 0x86753095555aaaa & ((1<<(size
*8))-1)
126 b
= 0xdeadbeef12345678 & ((1<<(size
*8))-1)
127 addrA
= self
.hart
.ram
128 addrB
= self
.hart
.ram
+ self
.hart
.ram_size
- size
129 self
.gdb
.p("*((%s*)0x%x) = 0x%x" % (data_type
, addrA
, a
))
130 self
.gdb
.p("*((%s*)0x%x) = 0x%x" % (data_type
, addrB
, b
))
131 assertEqual(self
.gdb
.p("*((%s*)0x%x)" % (data_type
, addrA
)), a
)
132 assertEqual(self
.gdb
.p("*((%s*)0x%x)" % (data_type
, addrB
)), b
)
134 class MemTest8(SimpleMemoryTest
):
136 self
.access_test(1, 'char')
138 class MemTest16(SimpleMemoryTest
):
140 self
.access_test(2, 'short')
142 class MemTest32(SimpleMemoryTest
):
144 self
.access_test(4, 'int')
146 class MemTest64(SimpleMemoryTest
):
148 self
.access_test(8, 'long long')
150 # FIXME: I'm not passing back invalid addresses correctly in read/write memory.
151 #class MemTestReadInvalid(SimpleMemoryTest):
153 # # This test relies on 'gdb_report_data_abort enable' being executed in
154 # # the openocd.cfg file.
156 # self.gdb.p("*((int*)0xdeadbeef)")
157 # assert False, "Read should have failed."
158 # except testlib.CannotAccess as e:
159 # assertEqual(e.address, 0xdeadbeef)
160 # self.gdb.p("*((int*)0x%x)" % self.hart.ram)
162 #class MemTestWriteInvalid(SimpleMemoryTest):
164 # # This test relies on 'gdb_report_data_abort enable' being executed in
165 # # the openocd.cfg file.
167 # self.gdb.p("*((int*)0xdeadbeef)=8675309")
168 # assert False, "Write should have failed."
169 # except testlib.CannotAccess as e:
170 # assertEqual(e.address, 0xdeadbeef)
171 # self.gdb.p("*((int*)0x%x)=6874742" % self.hart.ram)
173 class MemTestBlock(GdbTest
):
178 a
= tempfile
.NamedTemporaryFile(suffix
=".ihex")
180 for i
in range(self
.length
/ self
.line_length
):
181 line_data
= "".join(["%c" % random
.randrange(256)
182 for _
in range(self
.line_length
)])
184 a
.write(ihex_line(i
* self
.line_length
, 0, line_data
))
187 self
.gdb
.command("restore %s 0x%x" % (a
.name
, self
.hart
.ram
))
188 for offset
in range(0, self
.length
, 19*4) + [self
.length
-4]:
189 value
= self
.gdb
.p("*((int*)0x%x)" % (self
.hart
.ram
+ offset
))
190 written
= ord(data
[offset
]) | \
191 (ord(data
[offset
+1]) << 8) | \
192 (ord(data
[offset
+2]) << 16) | \
193 (ord(data
[offset
+3]) << 24)
194 assertEqual(value
, written
)
196 b
= tempfile
.NamedTemporaryFile(suffix
=".ihex")
197 self
.gdb
.command("dump ihex memory %s 0x%x 0x%x" % (b
.name
,
198 self
.hart
.ram
, self
.hart
.ram
+ self
.length
))
200 record_type
, address
, line_data
= ihex_parse(line
)
202 written_data
= data
[address
:address
+len(line_data
)]
203 if line_data
!= written_data
:
205 "Data mismatch at 0x%x; wrote %s but read %s" % (
206 address
, readable_binary_string(written_data
),
207 readable_binary_string(line_data
)))
209 class InstantHaltTest(GdbTest
):
211 """Assert that reset is really resetting what it should."""
212 self
.gdb
.command("monitor reset halt")
213 self
.gdb
.command("flushregs")
214 threads
= self
.gdb
.threads()
218 pcs
.append(self
.gdb
.p("$pc"))
220 assertIn(pc
, self
.hart
.reset_vectors
)
221 # mcycle and minstret have no defined reset value.
222 mstatus
= self
.gdb
.p("$mstatus")
223 assertEqual(mstatus
& (MSTATUS_MIE | MSTATUS_MPRV |
226 class InstantChangePc(GdbTest
):
228 """Change the PC right as we come out of reset."""
230 self
.gdb
.command("monitor reset halt")
231 self
.gdb
.command("flushregs")
232 self
.gdb
.command("p *((int*) 0x%x)=0x13" % self
.hart
.ram
)
233 self
.gdb
.command("p *((int*) 0x%x)=0x13" % (self
.hart
.ram
+ 4))
234 self
.gdb
.command("p *((int*) 0x%x)=0x13" % (self
.hart
.ram
+ 8))
235 self
.gdb
.p("$pc=0x%x" % self
.hart
.ram
)
237 assertEqual((self
.hart
.ram
+ 4), self
.gdb
.p("$pc"))
239 assertEqual((self
.hart
.ram
+ 8), self
.gdb
.p("$pc"))
241 class DebugTest(GdbSingleHartTest
):
242 # Include malloc so that gdb can make function calls. I suspect this malloc
243 # will silently blow through the memory set aside for it, so be careful.
244 compile_args
= ("programs/debug.c", "programs/checksum.c",
245 "programs/tiny-malloc.c", "-DDEFINE_MALLOC", "-DDEFINE_FREE")
251 def exit(self
, expected_result
=0xc86455d4):
252 output
= self
.gdb
.c()
253 assertIn("Breakpoint", output
)
254 assertIn("_exit", output
)
255 assertEqual(self
.gdb
.p("status"), expected_result
)
257 class DebugCompareSections(DebugTest
):
259 output
= self
.gdb
.command("compare-sections")
261 for line
in output
.splitlines():
262 if line
.startswith("Section"):
263 assert line
.endswith("matched.")
265 assertGreater(matched
, 1)
267 class DebugFunctionCall(DebugTest
):
269 self
.gdb
.b("main:start")
271 assertEqual(self
.gdb
.p('fib(6)'), 8)
272 assertEqual(self
.gdb
.p('fib(7)'), 13)
275 class DebugChangeString(DebugTest
):
277 text
= "This little piggy went to the market."
278 self
.gdb
.b("main:start")
280 self
.gdb
.p('fox = "%s"' % text
)
281 self
.exit(0x43b497b8)
283 class DebugTurbostep(DebugTest
):
285 """Single step a bunch of times."""
286 self
.gdb
.b("main:start")
288 self
.gdb
.command("p i=0")
294 pc
= self
.gdb
.p("$pc")
295 assertNotEqual(last_pc
, pc
)
296 if last_pc
and pc
> last_pc
and pc
- last_pc
<= 4:
301 # Some basic sanity that we're not running between breakpoints or
303 assertGreater(jumps
, 1)
304 assertGreater(advances
, 5)
306 class DebugExit(DebugTest
):
310 class DebugSymbols(DebugTest
):
314 output
= self
.gdb
.c()
315 assertIn(", main ", output
)
316 output
= self
.gdb
.c()
317 assertIn(", rot13 ", output
)
319 class DebugBreakpoint(DebugTest
):
322 # The breakpoint should be hit exactly 2 times.
324 output
= self
.gdb
.c()
326 assertIn("Breakpoint ", output
)
327 assertIn("rot13 ", output
)
330 class Hwbp1(DebugTest
):
332 if self
.hart
.instruction_hardware_breakpoint_count
< 1:
333 return 'not_applicable'
335 if not self
.hart
.honors_tdata1_hmode
:
336 # Run to main before setting the breakpoint, because startup code
337 # will otherwise clear the trigger that we set.
341 self
.gdb
.hbreak("rot13")
342 # The breakpoint should be hit exactly 2 times.
344 output
= self
.gdb
.c()
346 assertRegexpMatches(output
, r
"[bB]reakpoint")
347 assertIn("rot13 ", output
)
350 class Hwbp2(DebugTest
):
352 if self
.hart
.instruction_hardware_breakpoint_count
< 2:
353 return 'not_applicable'
355 self
.gdb
.hbreak("main")
356 self
.gdb
.hbreak("rot13")
357 # We should hit 3 breakpoints.
358 for expected
in ("main", "rot13", "rot13"):
359 output
= self
.gdb
.c()
361 assertRegexpMatches(output
, r
"[bB]reakpoint")
362 assertIn("%s " % expected
, output
)
365 class TooManyHwbp(DebugTest
):
368 self
.gdb
.hbreak("*rot13 + %d" % (i
* 4))
370 output
= self
.gdb
.c()
371 assertIn("Cannot insert hardware breakpoint", output
)
372 # Clean up, otherwise the hardware breakpoints stay set and future
374 self
.gdb
.command("D")
376 class Registers(DebugTest
):
378 # Get to a point in the code where some registers have actually been
383 # Try both forms to test gdb.
384 for cmd
in ("info all-registers", "info registers all"):
385 output
= self
.gdb
.command(cmd
)
386 for reg
in ('zero', 'ra', 'sp', 'gp', 'tp'):
387 assertIn(reg
, output
)
390 # mcpuid is one of the few registers that should have the high bit set
392 # Leave this commented out until gdb and spike agree on the encoding of
393 # mcpuid (which is going to be renamed to misa in any case).
394 #assertRegexpMatches(output, ".*mcpuid *0x80")
397 # The instret register should always be changing.
400 # instret = self.gdb.p("$instret")
401 # assertNotEqual(instret, last_instret)
402 # last_instret = instret
407 class UserInterrupt(DebugTest
):
409 """Sending gdb ^C while the program is running should cause it to
411 self
.gdb
.b("main:start")
414 self
.gdb
.c(wait
=False)
416 output
= self
.gdb
.interrupt()
417 assert "main" in output
418 assertGreater(self
.gdb
.p("j"), 10)
422 class InterruptTest(GdbSingleHartTest
):
423 compile_args
= ("programs/interrupt.c",)
425 def early_applicable(self
):
426 return self
.target
.supports_clint_mtime
433 output
= self
.gdb
.c()
434 assertIn(" main ", output
)
435 self
.gdb
.b("trap_entry")
436 output
= self
.gdb
.c()
437 assertIn(" trap_entry ", output
)
438 assertEqual(self
.gdb
.p("$mip") & 0x80, 0x80)
439 assertEqual(self
.gdb
.p("interrupt_count"), 0)
440 # You'd expect local to still be 0, but it looks like spike doesn't
441 # jump to the interrupt handler immediately after the write to
443 assertLess(self
.gdb
.p("local"), 1000)
444 self
.gdb
.command("delete breakpoints")
446 self
.gdb
.c(wait
=False)
449 interrupt_count
= self
.gdb
.p("interrupt_count")
450 local
= self
.gdb
.p("local")
451 if interrupt_count
> 1000 and \
455 assertGreater(interrupt_count
, 1000)
456 assertGreater(local
, 1000)
458 def postMortem(self
):
459 GdbSingleHartTest
.postMortem(self
)
460 self
.gdb
.p("*((long long*) 0x200bff8)")
461 self
.gdb
.p("*((long long*) 0x2004000)")
462 self
.gdb
.p("interrupt_count")
465 class MulticoreRegTest(GdbTest
):
466 compile_args
= ("programs/infinite_loop.S", "-DMULTICORE")
468 def early_applicable(self
):
469 return len(self
.target
.harts
) > 1
473 for hart
in self
.target
.harts
:
474 self
.gdb
.select_hart(hart
)
475 self
.gdb
.p("$pc=_start")
479 # Hart 0 is the first to be resumed, so we have to set the breakpoint
480 # there. gdb won't actually set the breakpoint until we tell it to
482 self
.gdb
.select_hart(self
.target
.harts
[0])
485 for hart
in self
.target
.harts
:
486 self
.gdb
.select_hart(hart
)
487 assertIn("main", self
.gdb
.where())
488 self
.gdb
.select_hart(self
.target
.harts
[0])
489 self
.gdb
.command("delete breakpoints")
491 # Run through the entire loop.
492 self
.gdb
.b("main_end")
496 for hart
in self
.target
.harts
:
497 self
.gdb
.select_hart(hart
)
498 assertIn("main_end", self
.gdb
.where())
499 # Check register values.
500 hart_id
= self
.gdb
.p("$x1")
501 assertNotIn(hart_id
, hart_ids
)
502 hart_ids
.append(hart_id
)
503 for n
in range(2, 32):
504 value
= self
.gdb
.p("$x%d" % n
)
505 assertEqual(value
, hart_ids
[-1] + n
- 1)
507 # Confirmed that we read different register values for different harts.
508 # Write a new value to x1, and run through the add sequence again.
510 for hart
in self
.target
.harts
:
511 self
.gdb
.select_hart(hart
)
512 self
.gdb
.p("$x1=0x%x" % (hart
.index
* 0x800))
513 self
.gdb
.p("$pc=main_post_csrr")
515 for hart
in self
.target
.harts
:
516 self
.gdb
.select_hart(hart
)
517 assertIn("main", self
.gdb
.where())
518 # Check register values.
519 for n
in range(1, 32):
520 value
= self
.gdb
.p("$x%d" % n
)
521 assertEqual(value
, hart
.index
* 0x800 + n
- 1)
523 class MulticoreRunHaltStepiTest(GdbTest
):
524 compile_args
= ("programs/multicore.c", "-DMULTICORE")
526 def early_applicable(self
):
527 return len(self
.target
.harts
) > 1
531 for hart
in self
.target
.harts
:
532 self
.gdb
.select_hart(hart
)
533 self
.gdb
.p("$pc=_start")
536 previous_hart_count
= [0 for h
in self
.target
.harts
]
537 previous_interrupt_count
= [0 for h
in self
.target
.harts
]
539 self
.gdb
.c(wait
=False)
544 self
.gdb
.p("$mstatus")
546 self
.gdb
.p("buf", fmt
="")
547 hart_count
= self
.gdb
.p("hart_count")
548 interrupt_count
= self
.gdb
.p("interrupt_count")
549 for i
, h
in enumerate(self
.target
.harts
):
550 assertGreater(hart_count
[i
], previous_hart_count
[i
])
551 assertGreater(interrupt_count
[i
], previous_interrupt_count
[i
])
552 self
.gdb
.select_hart(h
)
553 pc
= self
.gdb
.p("$pc")
555 stepped_pc
= self
.gdb
.p("$pc")
556 assertNotEqual(pc
, stepped_pc
)
558 class StepTest(GdbTest
):
559 compile_args
= ("programs/step.S", )
567 main_address
= self
.gdb
.p("$pc")
568 if self
.hart
.extensionSupported("c"):
569 sequence
= (4, 8, 0xc, 0xe, 0x14, 0x18, 0x22, 0x1c, 0x24, 0x24)
571 sequence
= (4, 8, 0xc, 0x10, 0x18, 0x1c, 0x28, 0x20, 0x2c, 0x2c)
572 for expected
in sequence
:
574 pc
= self
.gdb
.p("$pc")
575 assertEqual("%x" % (pc
- main_address
), "%x" % expected
)
577 class TriggerTest(GdbTest
):
578 compile_args
= ("programs/trigger.S", )
586 output
= self
.gdb
.c()
587 assertIn("Breakpoint", output
)
588 assertIn("_exit", output
)
590 class TriggerExecuteInstant(TriggerTest
):
591 """Test an execute breakpoint on the first instruction executed out of
594 main_address
= self
.gdb
.p("$pc")
595 self
.gdb
.command("hbreak *0x%x" % (main_address
+ 4))
597 assertEqual(self
.gdb
.p("$pc"), main_address
+4)
599 # FIXME: Triggers aren't quite working yet
600 #class TriggerLoadAddress(TriggerTest):
602 # self.gdb.command("rwatch *((&data)+1)")
603 # output = self.gdb.c()
604 # assertIn("read_loop", output)
605 # assertEqual(self.gdb.p("$a0"),
606 # self.gdb.p("(&data)+1"))
609 class TriggerLoadAddressInstant(TriggerTest
):
610 """Test a load address breakpoint on the first instruction executed out of
613 self
.gdb
.command("b just_before_read_loop")
615 read_loop
= self
.gdb
.p("&read_loop")
616 self
.gdb
.command("rwatch data")
618 # Accept hitting the breakpoint before or after the load instruction.
619 assertIn(self
.gdb
.p("$pc"), [read_loop
, read_loop
+ 4])
620 assertEqual(self
.gdb
.p("$a0"), self
.gdb
.p("&data"))
622 # FIXME: Triggers aren't quite working yet
623 #class TriggerStoreAddress(TriggerTest):
625 # self.gdb.command("watch *((&data)+3)")
626 # output = self.gdb.c()
627 # assertIn("write_loop", output)
628 # assertEqual(self.gdb.p("$a0"),
629 # self.gdb.p("(&data)+3"))
632 class TriggerStoreAddressInstant(TriggerTest
):
634 """Test a store address breakpoint on the first instruction executed out
636 self
.gdb
.command("b just_before_write_loop")
638 write_loop
= self
.gdb
.p("&write_loop")
639 self
.gdb
.command("watch data")
641 # Accept hitting the breakpoint before or after the store instruction.
642 assertIn(self
.gdb
.p("$pc"), [write_loop
, write_loop
+ 4])
643 assertEqual(self
.gdb
.p("$a0"), self
.gdb
.p("&data"))
645 class TriggerDmode(TriggerTest
):
646 def early_applicable(self
):
647 return self
.hart
.honors_tdata1_hmode
649 def check_triggers(self
, tdata1_lsbs
, tdata2
):
650 dmode
= 1 << (self
.hart
.xlen
-5)
654 if self
.hart
.xlen
== 32:
656 elif self
.hart
.xlen
== 64:
657 xlen_type
= 'long long'
659 raise NotImplementedError
664 tdata1
= self
.gdb
.p("((%s *)&data)[%d]" % (xlen_type
, 2*i
))
667 tdata2
= self
.gdb
.p("((%s *)&data)[%d]" % (xlen_type
, 2*i
+1))
672 assertEqual(tdata1
& 0xffff, tdata1_lsbs
)
673 assertEqual(tdata2
, tdata2
)
676 assertEqual(dmode_count
, 1)
681 self
.gdb
.command("hbreak write_load_trigger")
682 self
.gdb
.b("clear_triggers")
683 self
.gdb
.p("$pc=write_store_trigger")
684 output
= self
.gdb
.c()
685 assertIn("write_load_trigger", output
)
686 self
.check_triggers((1<<6) |
(1<<1), 0xdeadbee0)
687 output
= self
.gdb
.c()
688 assertIn("clear_triggers", output
)
689 self
.check_triggers((1<<6) |
(1<<0), 0xfeedac00)
691 class RegsTest(GdbTest
):
692 compile_args
= ("programs/regs.S", )
696 self
.gdb
.b("handle_trap")
699 class WriteGprs(RegsTest
):
701 regs
= [("x%d" % n
) for n
in range(2, 32)]
703 self
.gdb
.p("$pc=write_regs")
704 for i
, r
in enumerate(regs
):
705 self
.gdb
.p("$%s=%d" % (r
, (0xdeadbeef<<i
)+17))
706 self
.gdb
.p("$x1=data")
707 self
.gdb
.command("b all_done")
708 output
= self
.gdb
.c()
709 assertIn("Breakpoint ", output
)
711 # Just to get this data in the log.
712 self
.gdb
.command("x/30gx data")
713 self
.gdb
.command("info registers")
714 for n
in range(len(regs
)):
715 assertEqual(self
.gdb
.x("data+%d" % (8*n
), 'g'),
716 ((0xdeadbeef<<n
)+17) & ((1<<self
.hart
.xlen
)-1))
718 class WriteCsrs(RegsTest
):
720 # As much a test of gdb as of the simulator.
721 self
.gdb
.p("$mscratch=0")
723 assertEqual(self
.gdb
.p("$mscratch"), 0)
724 self
.gdb
.p("$mscratch=123")
726 assertEqual(self
.gdb
.p("$mscratch"), 123)
728 self
.gdb
.p("$pc=write_regs")
729 self
.gdb
.p("$x1=data")
730 self
.gdb
.command("b all_done")
731 self
.gdb
.command("c")
733 assertEqual(123, self
.gdb
.p("$mscratch"))
734 assertEqual(123, self
.gdb
.p("$x1"))
735 assertEqual(123, self
.gdb
.p("$csr832"))
737 class DownloadTest(GdbTest
):
739 # pylint: disable=attribute-defined-outside-init
740 length
= min(2**10, self
.hart
.ram_size
- 2048)
741 self
.download_c
= tempfile
.NamedTemporaryFile(prefix
="download_",
742 suffix
=".c", delete
=False)
743 self
.download_c
.write("#include <stdint.h>\n")
744 self
.download_c
.write(
745 "unsigned int crc32a(uint8_t *message, unsigned int size);\n")
746 self
.download_c
.write("uint32_t length = %d;\n" % length
)
747 self
.download_c
.write("uint8_t d[%d] = {\n" % length
)
749 assert length
% 16 == 0
750 for i
in range(length
/ 16):
751 self
.download_c
.write(" /* 0x%04x */ " % (i
* 16))
753 value
= random
.randrange(1<<8)
754 self
.download_c
.write("0x%02x, " % value
)
755 self
.crc
= binascii
.crc32("%c" % value
, self
.crc
)
756 self
.download_c
.write("\n")
757 self
.download_c
.write("};\n")
758 self
.download_c
.write("uint8_t *data = &d[0];\n")
759 self
.download_c
.write(
760 "uint32_t main() { return crc32a(data, length); }\n")
761 self
.download_c
.flush()
766 self
.binary
= self
.target
.compile(self
.hart
, self
.download_c
.name
,
767 "programs/checksum.c")
768 self
.gdb
.command("file %s" % self
.binary
)
772 self
.gdb
.command("b _exit")
773 self
.gdb
.c(timeout
=60)
774 assertEqual(self
.gdb
.p("status"), self
.crc
)
775 os
.unlink(self
.download_c
.name
)
777 #class MprvTest(GdbTest):
778 # compile_args = ("programs/mprv.S", )
783 # """Test that the debugger can access memory when MPRV is set."""
784 # self.gdb.c(wait=False)
786 # self.gdb.interrupt()
787 # output = self.gdb.command("p/x *(int*)(((char*)&data)-0x80000000)")
788 # assertIn("0xbead", output)
790 class PrivTest(GdbTest
):
791 compile_args
= ("programs/priv.S", )
793 # pylint: disable=attribute-defined-outside-init
796 misa
= self
.hart
.misa
797 self
.supported
= set()
799 self
.supported
.add(0)
801 self
.supported
.add(1)
803 self
.supported
.add(2)
804 self
.supported
.add(3)
806 class PrivRw(PrivTest
):
808 """Test reading/writing priv."""
809 for privilege
in range(4):
810 self
.gdb
.p("$priv=%d" % privilege
)
812 actual
= self
.gdb
.p("$priv")
813 assertIn(actual
, self
.supported
)
814 if privilege
in self
.supported
:
815 assertEqual(actual
, privilege
)
817 class PrivChange(PrivTest
):
819 """Test that the core's privilege level actually changes."""
821 if 0 not in self
.supported
:
822 return 'not_applicable'
828 self
.gdb
.p("$priv=3")
829 main_address
= self
.gdb
.p("$pc")
831 assertEqual("%x" % self
.gdb
.p("$pc"), "%x" % (main_address
+4))
834 self
.gdb
.p("$priv=0")
836 # Should have taken an exception, so be nowhere near main.
837 pc
= self
.gdb
.p("$pc")
838 assertTrue(pc
< main_address
or pc
> main_address
+ 0x100)
842 parser
= argparse
.ArgumentParser(
843 description
="Test that gdb can talk to a RISC-V target.",
845 Example command line from the real world:
846 Run all RegsTest cases against a physical FPGA, with custom openocd command:
847 ./gdbserver.py --freedom-e300 --server_cmd "$HOME/SiFive/openocd/src/openocd -s $HOME/SiFive/openocd/tcl -d" Simple
849 targets
.add_target_options(parser
)
851 testlib
.add_test_run_options(parser
)
853 # TODO: remove global
854 global parsed
# pylint: disable=global-statement
855 parsed
= parser
.parse_args()
856 target
= targets
.target(parsed
)
859 target
.xlen
= parsed
.xlen
861 module
= sys
.modules
[__name__
]
863 return testlib
.run_all_tests(module
, target
, parsed
)
865 # TROUBLESHOOTING TIPS
866 # If a particular test fails, run just that one test, eg.:
867 # ./gdbserver.py MprvTest.test_mprv
868 # Then inspect gdb.log and spike.log to see what happened in more detail.
870 if __name__
== '__main__':