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0b808858a410a53f876d02fec4a5fc42c52e42e2
[riscv-tests.git]
/
debug
/
targets
/
freedom-e300-sim
/
openocd.cfg
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adapter_khz 10000
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source [find interface/jtag_vpi.cfg]
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jtag_vpi_set_port $::env(JTAG_VPI_PORT)
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set _CHIPNAME riscv
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jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x10e31913
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME riscv -chain-position $_TARGETNAME
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init
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halt