dev/alpha_console.cc

   1 /*
   2  * Copyright (c) 2001-2005 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  */
  28
  29 /** @file
  30  * Alpha Console Definition
  31  */
  32
  33 #include <cstddef>
  34 #include <cstdio>
  35 #include <string>
  36
  37 #include "arch/alpha/system.hh"
  38 #include "base/inifile.hh"
  39 #include "base/str.hh"
  40 #include "base/trace.hh"
  41 #include "cpu/base.hh"
  42 #include "cpu/exec_context.hh"
  43 #include "dev/alpha_console.hh"
  44 #include "dev/platform.hh"
  45 #include "dev/simconsole.hh"
  46 #include "dev/simple_disk.hh"
  47 #include "mem/physical.hh"
  48 #include "sim/builder.hh"
  49 #include "sim/sim_object.hh"
  50
  51 using namespace std;
  52 using namespace AlphaISA;
  53
  54 AlphaConsole::AlphaConsole(Params *p)
  55     : BasicPioDevice(p), disk(p->disk),
  56       console(params()->cons), system(params()->alpha_sys), cpu(params()->cpu)
  57 {
  58
  59     pioSize = sizeof(struct AlphaAccess);
  60
  61     alphaAccess = new Access();
  62     alphaAccess->last_offset = pioSize - 1;
  63
  64     alphaAccess->version = ALPHA_ACCESS_VERSION;
  65     alphaAccess->diskUnit = 1;
  66
  67     alphaAccess->diskCount = 0;
  68     alphaAccess->diskPAddr = 0;
  69     alphaAccess->diskBlock = 0;
  70     alphaAccess->diskOperation = 0;
  71     alphaAccess->outputChar = 0;
  72     alphaAccess->inputChar = 0;
  73     bzero(alphaAccess->cpuStack, sizeof(alphaAccess->cpuStack));
  74
  75     system->setAlphaAccess(pioAddr);
  76 }
  77
  78 void
  79 AlphaConsole::startup()
  80 {
  81     alphaAccess->numCPUs = system->getNumCPUs();
  82     alphaAccess->kernStart = system->getKernelStart();
  83     alphaAccess->kernEnd = system->getKernelEnd();
  84     alphaAccess->entryPoint = system->getKernelEntry();
  85     alphaAccess->mem_size = system->physmem->size();
  86     alphaAccess->cpuClock = cpu->frequency() / 1000000; // In MHz
  87     alphaAccess->intrClockFrequency = params()->platform->intrFrequency();
  88 }
  89
  90 void
  91 AlphaConsole::addressRanges(AddrRangeList &range_list)
  92 {
  93     assert(pioSize != 0);
  94     range_list.clear();
  95     range_list.push_back(RangeSize(pioAddr, sizeof(struct AlphaAccess)));
  96 }
  97
  98
  99 Tick
 100 AlphaConsole::read(Packet &pkt)
 101 {
 102
 103     /** XXX Do we want to push the addr munging to a bus brige or something? So
 104      * the device has it's physical address and then the bridge adds on whatever
 105      * machine dependent address swizzle is required?
 106      */
 107
 108     assert(pkt.result == Unknown);
 109     assert(pkt.addr >= pioAddr && pkt.addr < pioAddr + pioSize);
 110
 111     pkt.time = curTick + pioDelay;
 112     Addr daddr = pkt.addr - pioAddr;
 113
 114     uint32_t *data32;
 115     uint64_t *data64;
 116
 117     switch (pkt.size)
 118     {
 119         case sizeof(uint32_t):
 120             if (!pkt.data) {
 121                 data32 = new uint32_t;
 122                 pkt.data = (uint8_t*)data32;
 123             } else
 124                 data32 = (uint32_t*)pkt.data;
 125
 126             switch (daddr)
 127             {
 128                 case offsetof(AlphaAccess, last_offset):
 129                     *data32 = alphaAccess->last_offset;
 130                     break;
 131                 case offsetof(AlphaAccess, version):
 132                     *data32 = alphaAccess->version;
 133                     break;
 134                 case offsetof(AlphaAccess, numCPUs):
 135                     *data32 = alphaAccess->numCPUs;
 136                     break;
 137                 case offsetof(AlphaAccess, intrClockFrequency):
 138                     *data32 = alphaAccess->intrClockFrequency;
 139                     break;
 140                 default:
 141                     /* Old console code read in everyting as a 32bit int
 142                      * we now break that for better error checking.
 143                      */
 144                     pkt.result = BadAddress;
 145             }
 146             DPRINTF(AlphaConsole, "read: offset=%#x val=%#x\n", daddr, *data32);
 147             break;
 148         case sizeof(uint64_t):
 149             if (!pkt.data) {
 150                 data64 = new uint64_t;
 151                 pkt.data = (uint8_t*)data64;
 152             } else
 153                 data64 = (uint64_t*)pkt.data;
 154             switch (daddr)
 155             {
 156                 case offsetof(AlphaAccess, inputChar):
 157                     *data64 = console->console_in();
 158                     break;
 159                 case offsetof(AlphaAccess, cpuClock):
 160                     *data64 = alphaAccess->cpuClock;
 161                     break;
 162                 case offsetof(AlphaAccess, mem_size):
 163                     *data64 = alphaAccess->mem_size;
 164                     break;
 165                 case offsetof(AlphaAccess, kernStart):
 166                     *data64 = alphaAccess->kernStart;
 167                     break;
 168                 case offsetof(AlphaAccess, kernEnd):
 169                     *data64 = alphaAccess->kernEnd;
 170                     break;
 171                 case offsetof(AlphaAccess, entryPoint):
 172                     *data64 = alphaAccess->entryPoint;
 173                     break;
 174                 case offsetof(AlphaAccess, diskUnit):
 175                     *data64 = alphaAccess->diskUnit;
 176                     break;
 177                 case offsetof(AlphaAccess, diskCount):
 178                     *data64 = alphaAccess->diskCount;
 179                     break;
 180                 case offsetof(AlphaAccess, diskPAddr):
 181                     *data64 = alphaAccess->diskPAddr;
 182                     break;
 183                 case offsetof(AlphaAccess, diskBlock):
 184                     *data64 = alphaAccess->diskBlock;
 185                     break;
 186                 case offsetof(AlphaAccess, diskOperation):
 187                     *data64 = alphaAccess->diskOperation;
 188                     break;
 189                 case offsetof(AlphaAccess, outputChar):
 190                     *data64 = alphaAccess->outputChar;
 191                     break;
 192                 default:
 193                     int cpunum = (daddr - offsetof(AlphaAccess, cpuStack)) /
 194                                  sizeof(alphaAccess->cpuStack[0]);
 195
 196                     if (cpunum >= 0 && cpunum < 64)
 197                         *data64 = alphaAccess->cpuStack[cpunum];
 198                     else
 199                         panic("Unknown 64bit access, %#x\n", daddr);
 200             }
 201             DPRINTF(AlphaConsole, "read: offset=%#x val=%#x\n", daddr, *data64);
 202             break;
 203         default:
 204             pkt.result = BadAddress;
 205     }
 206     if (pkt.result == Unknown) pkt.result = Success;
 207     return pioDelay;
 208 }
 209
 210 Tick
 211 AlphaConsole::write(Packet &pkt)
 212 {
 213     pkt.time = curTick + pioDelay;
 214
 215     assert(pkt.result == Unknown);
 216     assert(pkt.addr >= pioAddr && pkt.addr < pioAddr + pioSize);
 217     Addr daddr = pkt.addr - pioAddr;
 218
 219     uint64_t val = *(uint64_t *)pkt.data;
 220     assert(pkt.size == sizeof(uint64_t));
 221
 222     switch (daddr) {
 223       case offsetof(AlphaAccess, diskUnit):
 224         alphaAccess->diskUnit = val;
 225         break;
 226
 227       case offsetof(AlphaAccess, diskCount):
 228         alphaAccess->diskCount = val;
 229         break;
 230
 231       case offsetof(AlphaAccess, diskPAddr):
 232         alphaAccess->diskPAddr = val;
 233         break;
 234
 235       case offsetof(AlphaAccess, diskBlock):
 236         alphaAccess->diskBlock = val;
 237         break;
 238
 239       case offsetof(AlphaAccess, diskOperation):
 240         if (val == 0x13)
 241             disk->read(alphaAccess->diskPAddr, alphaAccess->diskBlock,
 242                        alphaAccess->diskCount);
 243         else
 244             panic("Invalid disk operation!");
 245
 246         break;
 247
 248       case offsetof(AlphaAccess, outputChar):
 249         console->out((char)(val & 0xff));
 250         break;
 251
 252       default:
 253         int cpunum = (daddr - offsetof(AlphaAccess, cpuStack)) /
 254                      sizeof(alphaAccess->cpuStack[0]);
 255         warn("%d: Trying to launch CPU number %d!", curTick, cpunum);
 256         assert(val > 0 && "Must not access primary cpu");
 257         if (cpunum >= 0 && cpunum < 64)
 258             alphaAccess->cpuStack[cpunum] = val;
 259         else
 260             panic("Unknown 64bit access, %#x\n", daddr);
 261     }
 262
 263     pkt.result = Success;
 264
 265     return pioDelay;
 266 }
 267
 268 void
 269 AlphaConsole::Access::serialize(ostream &os)
 270 {
 271     SERIALIZE_SCALAR(last_offset);
 272     SERIALIZE_SCALAR(version);
 273     SERIALIZE_SCALAR(numCPUs);
 274     SERIALIZE_SCALAR(mem_size);
 275     SERIALIZE_SCALAR(cpuClock);
 276     SERIALIZE_SCALAR(intrClockFrequency);
 277     SERIALIZE_SCALAR(kernStart);
 278     SERIALIZE_SCALAR(kernEnd);
 279     SERIALIZE_SCALAR(entryPoint);
 280     SERIALIZE_SCALAR(diskUnit);
 281     SERIALIZE_SCALAR(diskCount);
 282     SERIALIZE_SCALAR(diskPAddr);
 283     SERIALIZE_SCALAR(diskBlock);
 284     SERIALIZE_SCALAR(diskOperation);
 285     SERIALIZE_SCALAR(outputChar);
 286     SERIALIZE_SCALAR(inputChar);
 287     SERIALIZE_ARRAY(cpuStack,64);
 288 }
 289
 290 void
 291 AlphaConsole::Access::unserialize(Checkpoint *cp, const std::string &section)
 292 {
 293     UNSERIALIZE_SCALAR(last_offset);
 294     UNSERIALIZE_SCALAR(version);
 295     UNSERIALIZE_SCALAR(numCPUs);
 296     UNSERIALIZE_SCALAR(mem_size);
 297     UNSERIALIZE_SCALAR(cpuClock);
 298     UNSERIALIZE_SCALAR(intrClockFrequency);
 299     UNSERIALIZE_SCALAR(kernStart);
 300     UNSERIALIZE_SCALAR(kernEnd);
 301     UNSERIALIZE_SCALAR(entryPoint);
 302     UNSERIALIZE_SCALAR(diskUnit);
 303     UNSERIALIZE_SCALAR(diskCount);
 304     UNSERIALIZE_SCALAR(diskPAddr);
 305     UNSERIALIZE_SCALAR(diskBlock);
 306     UNSERIALIZE_SCALAR(diskOperation);
 307     UNSERIALIZE_SCALAR(outputChar);
 308     UNSERIALIZE_SCALAR(inputChar);
 309     UNSERIALIZE_ARRAY(cpuStack, 64);
 310 }
 311
 312 void
 313 AlphaConsole::serialize(ostream &os)
 314 {
 315     alphaAccess->serialize(os);
 316 }
 317
 318 void
 319 AlphaConsole::unserialize(Checkpoint *cp, const std::string &section)
 320 {
 321     alphaAccess->unserialize(cp, section);
 322 }
 323
 324 BEGIN_DECLARE_SIM_OBJECT_PARAMS(AlphaConsole)
 325
 326     SimObjectParam<SimConsole *> sim_console;
 327     SimObjectParam<SimpleDisk *> disk;
 328     Param<Addr> addr;
 329     SimObjectParam<AlphaSystem *> system;
 330     SimObjectParam<BaseCPU *> cpu;
 331     SimObjectParam<Platform *> platform;
 332     Param<Tick> pio_latency;
 333
 334 END_DECLARE_SIM_OBJECT_PARAMS(AlphaConsole)
 335
 336 BEGIN_INIT_SIM_OBJECT_PARAMS(AlphaConsole)
 337
 338     INIT_PARAM(sim_console, "The Simulator Console"),
 339     INIT_PARAM(disk, "Simple Disk"),
 340     INIT_PARAM(addr, "Device Address"),
 341     INIT_PARAM(system, "system object"),
 342     INIT_PARAM(cpu, "Processor"),
 343     INIT_PARAM(platform, "platform"),
 344     INIT_PARAM_DFLT(pio_latency, "Programmed IO latency", 1000)
 345
 346 END_INIT_SIM_OBJECT_PARAMS(AlphaConsole)
 347
 348 CREATE_SIM_OBJECT(AlphaConsole)
 349 {
 350     AlphaConsole::Params *p = new AlphaConsole::Params;
 351     p->name = getInstanceName();
 352     p->platform = platform;
 353     p->pio_addr = addr;
 354     p->pio_delay = pio_latency;
 355     p->cons = sim_console;
 356     p->disk = disk;
 357     p->alpha_sys = system;
 358     p->system = system;
 359     p->cpu = cpu;
 360     return new AlphaConsole(p);
 361 }
 362
 363 REGISTER_SIM_OBJECT("AlphaConsole", AlphaConsole)