2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 * Alpha Console Definition
37 #include "arch/alpha/system.hh"
38 #include "base/inifile.hh"
39 #include "base/str.hh"
40 #include "base/trace.hh"
41 #include "cpu/base.hh"
42 #include "cpu/exec_context.hh"
43 #include "dev/alpha_console.hh"
44 #include "dev/platform.hh"
45 #include "dev/simconsole.hh"
46 #include "dev/simple_disk.hh"
47 #include "mem/physical.hh"
48 #include "sim/builder.hh"
49 #include "sim/sim_object.hh"
52 using namespace AlphaISA
;
54 AlphaConsole::AlphaConsole(Params
*p
)
55 : BasicPioDevice(p
), disk(p
->disk
),
56 console(params()->cons
), system(params()->alpha_sys
), cpu(params()->cpu
)
59 pioSize
= sizeof(struct AlphaAccess
);
61 alphaAccess
= new Access();
62 alphaAccess
->last_offset
= pioSize
- 1;
64 alphaAccess
->version
= ALPHA_ACCESS_VERSION
;
65 alphaAccess
->diskUnit
= 1;
67 alphaAccess
->diskCount
= 0;
68 alphaAccess
->diskPAddr
= 0;
69 alphaAccess
->diskBlock
= 0;
70 alphaAccess
->diskOperation
= 0;
71 alphaAccess
->outputChar
= 0;
72 alphaAccess
->inputChar
= 0;
73 bzero(alphaAccess
->cpuStack
, sizeof(alphaAccess
->cpuStack
));
78 AlphaConsole::startup()
80 system
->setAlphaAccess(pioAddr
);
81 alphaAccess
->numCPUs
= system
->getNumCPUs();
82 alphaAccess
->kernStart
= system
->getKernelStart();
83 alphaAccess
->kernEnd
= system
->getKernelEnd();
84 alphaAccess
->entryPoint
= system
->getKernelEntry();
85 alphaAccess
->mem_size
= system
->physmem
->size();
86 alphaAccess
->cpuClock
= cpu
->frequency() / 1000000; // In MHz
87 alphaAccess
->intrClockFrequency
= params()->platform
->intrFrequency();
91 AlphaConsole::read(Packet
&pkt
)
94 /** XXX Do we want to push the addr munging to a bus brige or something? So
95 * the device has it's physical address and then the bridge adds on whatever
96 * machine dependent address swizzle is required?
99 assert(pkt
.result
== Unknown
);
100 assert(pkt
.addr
>= pioAddr
&& pkt
.addr
< pioAddr
+ pioSize
);
102 pkt
.time
= curTick
+ pioDelay
;
103 Addr daddr
= pkt
.addr
- pioAddr
;
110 case sizeof(uint32_t):
112 data32
= new uint32_t;
113 pkt
.data
= (uint8_t*)data32
;
115 data32
= (uint32_t*)pkt
.data
;
119 case offsetof(AlphaAccess
, last_offset
):
120 *data32
= alphaAccess
->last_offset
;
122 case offsetof(AlphaAccess
, version
):
123 *data32
= alphaAccess
->version
;
125 case offsetof(AlphaAccess
, numCPUs
):
126 *data32
= alphaAccess
->numCPUs
;
128 case offsetof(AlphaAccess
, intrClockFrequency
):
129 *data32
= alphaAccess
->intrClockFrequency
;
132 /* Old console code read in everyting as a 32bit int
133 * we now break that for better error checking.
135 pkt
.result
= BadAddress
;
137 DPRINTF(AlphaConsole
, "read: offset=%#x val=%#x\n", daddr
, *data32
);
139 case sizeof(uint64_t):
141 data64
= new uint64_t;
142 pkt
.data
= (uint8_t*)data64
;
144 data64
= (uint64_t*)pkt
.data
;
147 case offsetof(AlphaAccess
, inputChar
):
148 *data64
= console
->console_in();
150 case offsetof(AlphaAccess
, cpuClock
):
151 *data64
= alphaAccess
->cpuClock
;
153 case offsetof(AlphaAccess
, mem_size
):
154 *data64
= alphaAccess
->mem_size
;
156 case offsetof(AlphaAccess
, kernStart
):
157 *data64
= alphaAccess
->kernStart
;
159 case offsetof(AlphaAccess
, kernEnd
):
160 *data64
= alphaAccess
->kernEnd
;
162 case offsetof(AlphaAccess
, entryPoint
):
163 *data64
= alphaAccess
->entryPoint
;
165 case offsetof(AlphaAccess
, diskUnit
):
166 *data64
= alphaAccess
->diskUnit
;
168 case offsetof(AlphaAccess
, diskCount
):
169 *data64
= alphaAccess
->diskCount
;
171 case offsetof(AlphaAccess
, diskPAddr
):
172 *data64
= alphaAccess
->diskPAddr
;
174 case offsetof(AlphaAccess
, diskBlock
):
175 *data64
= alphaAccess
->diskBlock
;
177 case offsetof(AlphaAccess
, diskOperation
):
178 *data64
= alphaAccess
->diskOperation
;
180 case offsetof(AlphaAccess
, outputChar
):
181 *data64
= alphaAccess
->outputChar
;
184 int cpunum
= (daddr
- offsetof(AlphaAccess
, cpuStack
)) /
185 sizeof(alphaAccess
->cpuStack
[0]);
187 if (cpunum
>= 0 && cpunum
< 64)
188 *data64
= alphaAccess
->cpuStack
[cpunum
];
190 panic("Unknown 64bit access, %#x\n", daddr
);
192 DPRINTF(AlphaConsole
, "read: offset=%#x val=%#x\n", daddr
, *data64
);
195 pkt
.result
= BadAddress
;
197 if (pkt
.result
== Unknown
) pkt
.result
= Success
;
202 AlphaConsole::write(Packet
&pkt
)
204 pkt
.time
= curTick
+ pioDelay
;
206 assert(pkt
.result
== Unknown
);
207 assert(pkt
.addr
>= pioAddr
&& pkt
.addr
< pioAddr
+ pioSize
);
208 Addr daddr
= pkt
.addr
- pioAddr
;
210 uint64_t val
= *(uint64_t *)pkt
.data
;
211 assert(pkt
.size
== sizeof(uint64_t));
214 case offsetof(AlphaAccess
, diskUnit
):
215 alphaAccess
->diskUnit
= val
;
218 case offsetof(AlphaAccess
, diskCount
):
219 alphaAccess
->diskCount
= val
;
222 case offsetof(AlphaAccess
, diskPAddr
):
223 alphaAccess
->diskPAddr
= val
;
226 case offsetof(AlphaAccess
, diskBlock
):
227 alphaAccess
->diskBlock
= val
;
230 case offsetof(AlphaAccess
, diskOperation
):
232 disk
->read(alphaAccess
->diskPAddr
, alphaAccess
->diskBlock
,
233 alphaAccess
->diskCount
);
235 panic("Invalid disk operation!");
239 case offsetof(AlphaAccess
, outputChar
):
240 console
->out((char)(val
& 0xff));
244 int cpunum
= (daddr
- offsetof(AlphaAccess
, cpuStack
)) /
245 sizeof(alphaAccess
->cpuStack
[0]);
246 warn("%d: Trying to launch CPU number %d!", curTick
, cpunum
);
247 assert(val
> 0 && "Must not access primary cpu");
248 if (cpunum
>= 0 && cpunum
< 64)
249 alphaAccess
->cpuStack
[cpunum
] = val
;
251 panic("Unknown 64bit access, %#x\n", daddr
);
254 pkt
.result
= Success
;
260 AlphaConsole::Access::serialize(ostream
&os
)
262 SERIALIZE_SCALAR(last_offset
);
263 SERIALIZE_SCALAR(version
);
264 SERIALIZE_SCALAR(numCPUs
);
265 SERIALIZE_SCALAR(mem_size
);
266 SERIALIZE_SCALAR(cpuClock
);
267 SERIALIZE_SCALAR(intrClockFrequency
);
268 SERIALIZE_SCALAR(kernStart
);
269 SERIALIZE_SCALAR(kernEnd
);
270 SERIALIZE_SCALAR(entryPoint
);
271 SERIALIZE_SCALAR(diskUnit
);
272 SERIALIZE_SCALAR(diskCount
);
273 SERIALIZE_SCALAR(diskPAddr
);
274 SERIALIZE_SCALAR(diskBlock
);
275 SERIALIZE_SCALAR(diskOperation
);
276 SERIALIZE_SCALAR(outputChar
);
277 SERIALIZE_SCALAR(inputChar
);
278 SERIALIZE_ARRAY(cpuStack
,64);
282 AlphaConsole::Access::unserialize(Checkpoint
*cp
, const std::string
§ion
)
284 UNSERIALIZE_SCALAR(last_offset
);
285 UNSERIALIZE_SCALAR(version
);
286 UNSERIALIZE_SCALAR(numCPUs
);
287 UNSERIALIZE_SCALAR(mem_size
);
288 UNSERIALIZE_SCALAR(cpuClock
);
289 UNSERIALIZE_SCALAR(intrClockFrequency
);
290 UNSERIALIZE_SCALAR(kernStart
);
291 UNSERIALIZE_SCALAR(kernEnd
);
292 UNSERIALIZE_SCALAR(entryPoint
);
293 UNSERIALIZE_SCALAR(diskUnit
);
294 UNSERIALIZE_SCALAR(diskCount
);
295 UNSERIALIZE_SCALAR(diskPAddr
);
296 UNSERIALIZE_SCALAR(diskBlock
);
297 UNSERIALIZE_SCALAR(diskOperation
);
298 UNSERIALIZE_SCALAR(outputChar
);
299 UNSERIALIZE_SCALAR(inputChar
);
300 UNSERIALIZE_ARRAY(cpuStack
, 64);
304 AlphaConsole::serialize(ostream
&os
)
306 alphaAccess
->serialize(os
);
310 AlphaConsole::unserialize(Checkpoint
*cp
, const std::string
§ion
)
312 alphaAccess
->unserialize(cp
, section
);
315 BEGIN_DECLARE_SIM_OBJECT_PARAMS(AlphaConsole
)
317 SimObjectParam
<SimConsole
*> sim_console
;
318 SimObjectParam
<SimpleDisk
*> disk
;
319 Param
<Addr
> pio_addr
;
320 SimObjectParam
<AlphaSystem
*> system
;
321 SimObjectParam
<BaseCPU
*> cpu
;
322 SimObjectParam
<Platform
*> platform
;
323 Param
<Tick
> pio_latency
;
325 END_DECLARE_SIM_OBJECT_PARAMS(AlphaConsole
)
327 BEGIN_INIT_SIM_OBJECT_PARAMS(AlphaConsole
)
329 INIT_PARAM(sim_console
, "The Simulator Console"),
330 INIT_PARAM(disk
, "Simple Disk"),
331 INIT_PARAM(pio_addr
, "Device Address"),
332 INIT_PARAM(system
, "system object"),
333 INIT_PARAM(cpu
, "Processor"),
334 INIT_PARAM(platform
, "platform"),
335 INIT_PARAM_DFLT(pio_latency
, "Programmed IO latency", 1000)
337 END_INIT_SIM_OBJECT_PARAMS(AlphaConsole
)
339 CREATE_SIM_OBJECT(AlphaConsole
)
341 AlphaConsole::Params
*p
= new AlphaConsole::Params
;
342 p
->name
= getInstanceName();
343 p
->platform
= platform
;
344 p
->pio_addr
= pio_addr
;
345 p
->pio_delay
= pio_latency
;
346 p
->cons
= sim_console
;
348 p
->alpha_sys
= system
;
351 return new AlphaConsole(p
);
354 REGISTER_SIM_OBJECT("AlphaConsole", AlphaConsole
)