First steps toward getting full system to work with
[gem5.git] / dev / alpha_console.hh
1 /*
2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 /** @file
30 * System Console Interface
31 */
32
33 #ifndef __ALPHA_CONSOLE_HH__
34 #define __ALPHA_CONSOLE_HH__
35
36 #include "base/range.hh"
37 #include "dev/alpha_access.h"
38 #include "dev/io_device.hh"
39 #include "sim/host.hh"
40 #include "sim/sim_object.hh"
41
42 class BaseCPU;
43 class SimConsole;
44 class AlphaSystem;
45 class SimpleDisk;
46
47 /**
48 * Memory mapped interface to the system console. This device
49 * represents a shared data region between the OS Kernel and the
50 * System Console.
51 *
52 * The system console is a small standalone program that is initially
53 * run when the system boots. It contains the necessary code to
54 * access the boot disk, to read/write from the console, and to pass
55 * boot parameters to the kernel.
56 *
57 * This version of the system console is very different from the one
58 * that would be found in a real system. Many of the functions use
59 * some sort of backdoor to get their job done. For example, reading
60 * from the boot device on a real system would require a minimal
61 * device driver to access the disk controller, but since we have a
62 * simulator here, we are able to bypass the disk controller and
63 * access the disk image directly. There are also some things like
64 * reading the kernel off the disk image into memory that are normally
65 * taken care of by the console that are now taken care of by the
66 * simulator.
67 *
68 * These shortcuts are acceptable since the system console is
69 * primarily used doing boot before the kernel has loaded its device
70 * drivers.
71 */
72 class AlphaConsole : public BasicPioDevice
73 {
74 protected:
75 struct Access : public AlphaAccess
76 {
77 void serialize(std::ostream &os);
78 void unserialize(Checkpoint *cp, const std::string &section);
79 };
80
81 union {
82 Access *alphaAccess;
83 uint8_t *consoleData;
84 };
85
86 /** the disk must be accessed from the console */
87 SimpleDisk *disk;
88
89 /** the system console (the terminal) is accessable from the console */
90 SimConsole *console;
91
92 /** a pointer to the system we are running in */
93 AlphaSystem *system;
94
95 /** a pointer to the CPU boot cpu */
96 BaseCPU *cpu;
97
98 public:
99 struct Params : public BasicPioDevice::Params
100 {
101 SimConsole *cons;
102 SimpleDisk *disk;
103 AlphaSystem *alpha_sys;
104 BaseCPU *cpu;
105 };
106 protected:
107 const Params *params() const {return (const Params *)_params; }
108
109 public:
110
111 /** Standard Constructor */
112 AlphaConsole(Params *p);
113
114 virtual void startup();
115
116 /**
117 * memory mapped reads and writes
118 */
119 virtual Tick read(Packet *pkt);
120 virtual Tick write(Packet *pkt);
121
122 /**
123 * standard serialization routines for checkpointing
124 */
125 virtual void serialize(std::ostream &os);
126 virtual void unserialize(Checkpoint *cp, const std::string &section);
127 };
128
129 #endif // __ALPHA_CONSOLE_HH__