Merge zizzer:/bk/m5
[gem5.git] / dev / baddev.cc
1 /*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 /** @file
30 * BadDevice implemenation
31 */
32
33 #include <deque>
34 #include <string>
35 #include <vector>
36
37 #include "base/trace.hh"
38 #include "cpu/exec_context.hh"
39 #include "dev/baddev.hh"
40 #include "dev/platform.hh"
41 #include "mem/bus/bus.hh"
42 #include "mem/bus/pio_interface.hh"
43 #include "mem/bus/pio_interface_impl.hh"
44 #include "mem/functional/memory_control.hh"
45 #include "sim/builder.hh"
46 #include "sim/system.hh"
47
48 using namespace std;
49 using namespace TheISA;
50
51 BadDevice::BadDevice(const string &name, Addr a, MemoryController *mmu,
52 HierParams *hier, Bus *pio_bus, const string &devicename)
53 : PioDevice(name, NULL), addr(a), devname(devicename)
54 {
55 mmu->add_child(this, RangeSize(addr, size));
56
57 if (pio_bus) {
58 pioInterface = newPioInterface(name, hier, pio_bus, this,
59 &BadDevice::cacheAccess);
60 pioInterface->addAddrRange(RangeSize(addr, size));
61 }
62
63 }
64
65 Fault
66 BadDevice::read(MemReqPtr &req, uint8_t *data)
67 {
68
69 panic("Device %s not imlpmented\n", devname);
70 return NoFault;
71 }
72
73 Fault
74 BadDevice::write(MemReqPtr &req, const uint8_t *data)
75 {
76 panic("Device %s not imlpmented\n", devname);
77 return NoFault;
78 }
79
80 Tick
81 BadDevice::cacheAccess(MemReqPtr &req)
82 {
83 return curTick;
84 }
85
86 BEGIN_DECLARE_SIM_OBJECT_PARAMS(BadDevice)
87
88 SimObjectParam<Platform *> platform;
89 SimObjectParam<MemoryController *> mmu;
90 Param<Addr> addr;
91 SimObjectParam<HierParams *> hier;
92 SimObjectParam<Bus*> pio_bus;
93 Param<Tick> pio_latency;
94 Param<string> devicename;
95
96 END_DECLARE_SIM_OBJECT_PARAMS(BadDevice)
97
98 BEGIN_INIT_SIM_OBJECT_PARAMS(BadDevice)
99
100 INIT_PARAM(platform, "Platform"),
101 INIT_PARAM(mmu, "Memory Controller"),
102 INIT_PARAM(addr, "Device Address"),
103 INIT_PARAM_DFLT(hier, "Hierarchy global variables", &defaultHierParams),
104 INIT_PARAM_DFLT(pio_bus, "The IO Bus to attach to", NULL),
105 INIT_PARAM_DFLT(pio_latency, "Programmed IO latency", 1000),
106 INIT_PARAM(devicename, "Name of device to error on")
107
108 END_INIT_SIM_OBJECT_PARAMS(BadDevice)
109
110 CREATE_SIM_OBJECT(BadDevice)
111 {
112 return new BadDevice(getInstanceName(), addr, mmu, hier, pio_bus,
113 devicename);
114 }
115
116 REGISTER_SIM_OBJECT("BadDevice", BadDevice)