dev/ide_atareg.h

   1 /*      $OpenBSD: atareg.h,v 1.12 2004/09/24 07:15:22 grange Exp $      */
   2 /*      $NetBSD: atareg.h,v 1.5 1999/01/18 20:06:24 bouyer Exp $        */
   3
   4 /*
   5  * Copyright (c) 1998, 2001 Manuel Bouyer.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions and the following disclaimer.
  12  * 2. Redistributions in binary form must reproduce the above copyright
  13  *    notice, this list of conditions and the following disclaimer in the
  14  *    documentation and/or other materials provided with the distribution.
  15  * 3. All advertising materials mentioning features or use of this software
  16  *    must display the following acknowledgement:
  17  *      This product includes software developed by Manuel Bouyer.
  18  * 4. The name of the author may not be used to endorse or promote products
  19  *    derived from this software without specific prior written permission.
  20  *
  21  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  22  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  23  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  24  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  25  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  26  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  27  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  28  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  29  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  30  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  31  */
  32
  33 #ifndef _DEV_ATA_ATAREG_H_
  34 #define _DEV_ATA_ATAREG_H_
  35
  36 #if defined(linux)
  37 #include <endian.h>
  38 #else
  39 #include <machine/endian.h>
  40 #endif
  41
  42 #define ATA_BYTE_ORDER LITTLE_ENDIAN
  43
  44 /*
  45  * Drive parameter structure for ATA/ATAPI.
  46  * Bit fields: WDC_* : common to ATA/ATAPI
  47  *             ATA_* : ATA only
  48  *             ATAPI_* : ATAPI only.
  49  */
  50 struct ataparams {
  51     /* drive info */
  52     uint16_t    atap_config;            /* 0: general configuration */
  53 #define WDC_CFG_ATAPI_MASK              0xc000
  54 #define WDC_CFG_ATAPI                   0x8000
  55 #define ATA_CFG_REMOVABLE               0x0080
  56 #define ATA_CFG_FIXED                   0x0040
  57 #define ATAPI_CFG_TYPE_MASK             0x1f00
  58 #define ATAPI_CFG_TYPE(x)               (((x) & ATAPI_CFG_TYPE_MASK) >> 8)
  59 #define ATAPI_CFG_TYPE_DIRECT           0x00
  60 #define ATAPI_CFG_TYPE_SEQUENTIAL       0x01
  61 #define ATAPI_CFG_TYPE_CDROM            0x05
  62 #define ATAPI_CFG_TYPE_OPTICAL          0x07
  63 #define ATAPI_CFG_TYPE_NODEVICE         0x1F
  64 #define ATAPI_CFG_REMOV                 0x0080
  65 #define ATAPI_CFG_DRQ_MASK              0x0060
  66 #define ATAPI_CFG_STD_DRQ               0x0000
  67 #define ATAPI_CFG_IRQ_DRQ               0x0020
  68 #define ATAPI_CFG_ACCEL_DRQ             0x0040
  69 #define ATAPI_CFG_CMD_MASK              0x0003
  70 #define ATAPI_CFG_CMD_12                0x0000
  71 #define ATAPI_CFG_CMD_16                0x0001
  72 /* words 1-9 are ATA only */
  73     uint16_t    atap_cylinders;         /* 1: # of non-removable cylinders */
  74     uint16_t    __reserved1;
  75     uint16_t    atap_heads;             /* 3: # of heads */
  76     uint16_t    __retired1[2];          /* 4-5: # of unform. bytes/track */
  77     uint16_t    atap_sectors;           /* 6: # of sectors */
  78     uint16_t    __retired2[3];
  79
  80     uint8_t     atap_serial[20];        /* 10-19: serial number */
  81     uint16_t    __retired3[2];
  82     uint16_t    __obsolete1;
  83     uint8_t     atap_revision[8];       /* 23-26: firmware revision */
  84     uint8_t     atap_model[40];         /* 27-46: model number */
  85     uint16_t    atap_multi;             /* 47: maximum sectors per irq (ATA) */
  86     uint16_t    __reserved2;
  87     uint8_t     atap_vendor;            /* 49: vendor  */
  88     uint8_t     atap_capabilities1;     /* 49: capability flags */
  89 #define WDC_CAP_IORDY   0x0800
  90 #define WDC_CAP_IORDY_DSBL 0x0400
  91 #define WDC_CAP_LBA     0x0200
  92 #define WDC_CAP_DMA     0x0100
  93 #define ATA_CAP_STBY    0x2000
  94 #define ATAPI_CAP_INTERL_DMA    0x8000
  95 #define ATAPI_CAP_CMD_QUEUE     0x4000
  96 #define ATAPI_CAP_OVERLP        0x2000
  97 #define ATAPI_CAP_ATA_RST       0x1000
  98     uint16_t    atap_capabilities2;     /* 50: capability flags (ATA) */
  99 #if ATA_BYTE_ORDER == LITTLE_ENDIAN
 100     uint8_t     __junk2;
 101     uint8_t     atap_oldpiotiming;      /* 51: old PIO timing mode */
 102     uint8_t     __junk3;
 103     uint8_t     atap_olddmatiming;      /* 52: old DMA timing mode (ATA) */
 104 #else
 105     uint8_t     atap_oldpiotiming;      /* 51: old PIO timing mode */
 106     uint8_t     __junk2;
 107     uint8_t     atap_olddmatiming;      /* 52: old DMA timing mode (ATA) */
 108     uint8_t     __junk3;
 109 #endif
 110     uint16_t    atap_extensions;        /* 53: extensions supported */
 111 #define WDC_EXT_UDMA_MODES      0x0004
 112 #define WDC_EXT_MODES           0x0002
 113 #define WDC_EXT_GEOM            0x0001
 114 /* words 54-62 are ATA only */
 115     uint16_t    atap_curcylinders;      /* 54: current logical cylinders */
 116     uint16_t    atap_curheads;          /* 55: current logical heads */
 117     uint16_t    atap_cursectors;        /* 56: current logical sectors/tracks */
 118     uint16_t    atap_curcapacity[2];    /* 57-58: current capacity */
 119     uint8_t     atap_curmulti;          /* 59: current multi-sector setting */
 120     uint8_t     atap_curmulti_valid;    /* 59: current multi-sector setting */
 121 #define WDC_MULTI_VALID 0x0100
 122 #define WDC_MULTI_MASK  0x00ff
 123     uint32_t    atap_capacity;  /* 60-61: total capacity (LBA only) */
 124     uint16_t    __retired4;
 125 #if ATA_BYTE_ORDER == LITTLE_ENDIAN
 126     uint8_t     atap_dmamode_supp;      /* 63: multiword DMA mode supported */
 127     uint8_t     atap_dmamode_act;       /*     multiword DMA mode active */
 128     uint8_t     atap_piomode_supp;      /* 64: PIO mode supported */
 129     uint8_t     __junk4;
 130 #else
 131     uint8_t     atap_dmamode_act;       /*     multiword DMA mode active */
 132     uint8_t     atap_dmamode_supp;      /* 63: multiword DMA mode supported */
 133     uint8_t     __junk4;
 134     uint8_t     atap_piomode_supp;      /* 64: PIO mode supported */
 135 #endif
 136     uint16_t    atap_dmatiming_mimi;    /* 65: minimum DMA cycle time */
 137     uint16_t    atap_dmatiming_recom;   /* 66: recommended DMA cycle time */
 138     uint16_t    atap_piotiming;         /* 67: mini PIO cycle time without FC */
 139     uint16_t    atap_piotiming_iordy;   /* 68: mini PIO cycle time with IORDY FC */
 140     uint16_t    __reserved3[2];
 141 /* words 71-72 are ATAPI only */
 142     uint16_t    atap_pkt_br;            /* 71: time (ns) to bus release */
 143     uint16_t    atap_pkt_bsyclr;        /* 72: tme to clear BSY after service */
 144     uint16_t    __reserved4[2];
 145     uint16_t    atap_queuedepth;        /* 75: */
 146 #define WDC_QUEUE_DEPTH_MASK 0x1f
 147     uint16_t    atap_sata_caps;         /* 76: SATA capabilities */
 148 #define SATA_SIGNAL_GEN1        0x0002  /* SATA Gen-1 signaling speed */
 149 #define SATA_SIGNAL_GEN2        0x0004  /* SATA Gen-2 signaling speed */
 150 #define SATA_NATIVE_CMDQ        0x0100  /* native command queuing */
 151 #define SATA_HOST_PWR_MGMT      0x0200  /* power management (host) */
 152     uint16_t    atap_sata_reserved;     /* 77: reserved */
 153     uint16_t    atap_sata_features_supp;/* 78: SATA features supported */
 154 #define SATA_NONZERO_OFFSETS    0x0002  /* non-zero buffer offsets */
 155 #define SATA_DMA_SETUP_AUTO     0x0004  /* DMA setup auto-activate */
 156 #define SATA_DRIVE_PWR_MGMT     0x0008  /* power management (device) */
 157     uint16_t    atap_sata_features_en;  /* 79: SATA features enabled */
 158     uint16_t    atap_ata_major;         /* 80: Major version number */
 159 #define WDC_VER_ATA1    0x0002
 160 #define WDC_VER_ATA2    0x0004
 161 #define WDC_VER_ATA3    0x0008
 162 #define WDC_VER_ATA4    0x0010
 163 #define WDC_VER_ATA5    0x0020
 164 #define WDC_VER_ATA6    0x0040
 165 #define WDC_VER_ATA7    0x0080
 166 #define WDC_VER_ATA8    0x0100
 167 #define WDC_VER_ATA9    0x0200
 168 #define WDC_VER_ATA10   0x0400
 169 #define WDC_VER_ATA11   0x0800
 170 #define WDC_VER_ATA12   0x1000
 171 #define WDC_VER_ATA13   0x2000
 172 #define WDC_VER_ATA14   0x4000
 173     uint16_t    atap_ata_minor;         /* 81: Minor version number */
 174     uint16_t    atap_cmd_set1;          /* 82: command set supported */
 175 #define WDC_CMD1_NOP    0x4000
 176 #define WDC_CMD1_RB     0x2000
 177 #define WDC_CMD1_WB     0x1000
 178 #define WDC_CMD1_HPA    0x0400
 179 #define WDC_CMD1_DVRST  0x0200
 180 #define WDC_CMD1_SRV    0x0100
 181 #define WDC_CMD1_RLSE   0x0080
 182 #define WDC_CMD1_AHEAD  0x0040
 183 #define WDC_CMD1_CACHE  0x0020
 184 #define WDC_CMD1_PKT    0x0010
 185 #define WDC_CMD1_PM     0x0008
 186 #define WDC_CMD1_REMOV  0x0004
 187 #define WDC_CMD1_SEC    0x0002
 188 #define WDC_CMD1_SMART  0x0001
 189     uint16_t    atap_cmd_set2;          /* 83: command set supported */
 190 #define ATAPI_CMD2_FCE  0x2000 /* Flush Cache Ext supported */
 191 #define ATAPI_CMD2_FC   0x1000 /* Flush Cache supported */
 192 #define ATAPI_CMD2_DCO  0x0800 /* Device Configuration Overlay supported */
 193 #define ATAPI_CMD2_48AD 0x0400 /* 48bit address supported */
 194 #define ATAPI_CMD2_AAM  0x0200 /* Automatic Acoustic Management supported */
 195 #define ATAPI_CMD2_SM   0x0100 /* Set Max security extension supported */
 196 #define ATAPI_CMD2_SF   0x0040 /* Set Features subcommand required */
 197 #define ATAPI_CMD2_PUIS 0x0020 /* Power up in standby supported */
 198 #define WDC_CMD2_RMSN   0x0010
 199 #define ATA_CMD2_APM    0x0008
 200 #define ATA_CMD2_CFA    0x0004
 201 #define ATA_CMD2_RWQ    0x0002
 202 #define WDC_CMD2_DM     0x0001 /* Download Microcode supported */
 203     uint16_t    atap_cmd_ext;           /* 84: command/features supp. ext. */
 204 #define ATAPI_CMDE_MSER 0x0004 /* Media serial number supported */
 205 #define ATAPI_CMDE_TEST 0x0002 /* SMART self-test supported */
 206 #define ATAPI_CMDE_SLOG 0x0001 /* SMART error logging supported */
 207     uint16_t    atap_cmd1_en;           /* 85: cmd/features enabled */
 208 /* bits are the same as atap_cmd_set1 */
 209     uint16_t    atap_cmd2_en;           /* 86: cmd/features enabled */
 210 /* bits are the same as atap_cmd_set2 */
 211     uint16_t    atap_cmd_def;           /* 87: cmd/features default */
 212 /* bits are NOT the same as atap_cmd_ext */
 213 #if ATA_BYTE_ORDER == LITTLE_ENDIAN
 214     uint8_t     atap_udmamode_supp;     /* 88: Ultra-DMA mode supported */
 215     uint8_t     atap_udmamode_act;      /*     Ultra-DMA mode active */
 216 #else
 217     uint8_t     atap_udmamode_act;      /*     Ultra-DMA mode active */
 218     uint8_t     atap_udmamode_supp;     /* 88: Ultra-DMA mode supported */
 219 #endif
 220 /* 89-92 are ATA-only */
 221     uint16_t    atap_seu_time;          /* 89: Sec. Erase Unit compl. time */
 222     uint16_t    atap_eseu_time;         /* 90: Enhanced SEU compl. time */
 223     uint16_t    atap_apm_val;           /* 91: current APM value */
 224     uint16_t    atap_mpasswd_rev;       /* 92: Master Password revision */
 225     uint16_t    atap_hwreset_res;       /* 93: Hardware reset value */
 226 #define ATA_HWRES_CBLID    0x2000  /* CBLID above Vih */
 227 #define ATA_HWRES_D1_PDIAG 0x0800  /* Device 1 PDIAG detect OK */
 228 #define ATA_HWRES_D1_CSEL  0x0400  /* Device 1 used CSEL for address */
 229 #define ATA_HWRES_D1_JUMP  0x0200  /* Device 1 jumpered to address */
 230 #define ATA_HWRES_D0_SEL   0x0040  /* Device 0 responds when Dev 1 selected */
 231 #define ATA_HWRES_D0_DASP  0x0020  /* Device 0 DASP detect OK */
 232 #define ATA_HWRES_D0_PDIAG 0x0010  /* Device 0 PDIAG detect OK */
 233 #define ATA_HWRES_D0_DIAG  0x0008  /* Device 0 diag OK */
 234 #define ATA_HWRES_D0_CSEL  0x0004  /* Device 0 used CSEL for address */
 235 #define ATA_HWRES_D0_JUMP  0x0002  /* Device 0 jumpered to address */
 236 #if ATA_BYTE_ORDER == LITTLE_ENDIAN
 237     uint8_t     atap_acoustic_val;      /* 94: Current acoustic level */
 238     uint8_t     atap_acoustic_def;      /*     recommended level */
 239 #else
 240     uint8_t     atap_acoustic_def;      /*     recommended level */
 241     uint8_t     atap_acoustic_val;      /* 94: Current acoustic level */
 242 #endif
 243     uint16_t    __reserved6[5];         /* 95-99: reserved */
 244     uint16_t    atap_max_lba[4];        /* 100-103: Max. user LBA add */
 245     uint16_t    __reserved7[23];        /* 104-126: reserved */
 246     uint16_t    atap_rmsn_supp;         /* 127: remov. media status notif. */
 247 #define WDC_RMSN_SUPP_MASK 0x0003
 248 #define WDC_RMSN_SUPP 0x0001
 249     uint16_t    atap_sec_st;            /* 128: security status */
 250 #define WDC_SEC_LEV_MAX 0x0100
 251 #define WDC_SEC_ESE_SUPP 0x0020
 252 #define WDC_SEC_EXP     0x0010
 253 #define WDC_SEC_FROZEN  0x0008
 254 #define WDC_SEC_LOCKED  0x0004
 255 #define WDC_SEC_EN      0x0002
 256 #define WDC_SEC_SUPP    0x0001
 257     uint16_t    __reserved8[31];        /* 129-159: vendor specific */
 258     uint16_t    atap_cfa_power;         /* 160: CFA powermode */
 259 #define ATAPI_CFA_MAX_MASK  0x0FFF
 260 #define ATAPI_CFA_MODE1_DIS 0x1000 /* CFA Mode 1 Disabled */
 261 #define ATAPI_CFA_MODE1_REQ 0x2000 /* CFA Mode 1 Required */
 262 #define ATAPI_CFA_WORD160   0x8000 /* Word 160 supported */
 263     uint16_t    __reserved9[15];        /* 161-175: reserved for CFA */
 264     uint8_t     atap_media_serial[60];  /* 176-205: media serial number */
 265     uint16_t    __reserved10[49];       /* 206-254: reserved */
 266 #if ATA_BYTE_ORDER == LITTLE_ENDIAN
 267     uint8_t     atap_signature;         /* 255: Signature */
 268     uint8_t     atap_checksum;          /*      Checksum */
 269 #else
 270     uint8_t     atap_checksum;          /*      Checksum */
 271     uint8_t     atap_signature;         /* 255: Signature */
 272 #endif
 273 };
 274
 275 #undef ATA_BYTE_ORDER
 276 #endif  /* !_DEV_ATA_ATAREG_H_ */