2 * Copyright (c) 2004 The Regents of The University of Michigan
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30 * Device model for an IDE disk
33 #ifndef __IDE_DISK_HH__
34 #define __IDE_DISK_HH__
37 #include "dev/disk_image.hh"
38 #include "dev/io_device.hh"
39 #include "sim/eventq.hh"
41 #define DMA_BACKOFF_PERIOD 200
43 #define MAX_DMA_SIZE (65536) // 64K
44 #define MAX_MULTSECT (128)
46 #define PRD_BASE_MASK 0xfffffffe
47 #define PRD_COUNT_MASK 0xfffe
48 #define PRD_EOT_MASK 0x8000
50 typedef struct PrdEntry {
60 uint32_t getBaseAddr()
62 return (entry.baseAddr & PRD_BASE_MASK);
65 uint32_t getByteCount()
67 return ((entry.byteCount == 0) ? MAX_DMA_SIZE :
68 (entry.byteCount & PRD_COUNT_MASK));
73 return (entry.endOfTable & PRD_EOT_MASK);
77 #define DATA_OFFSET (0)
78 #define ERROR_OFFSET (1)
79 #define FEATURES_OFFSET (1)
80 #define NSECTOR_OFFSET (2)
81 #define SECTOR_OFFSET (3)
82 #define LCYL_OFFSET (4)
83 #define HCYL_OFFSET (5)
84 #define SELECT_OFFSET (6)
85 #define STATUS_OFFSET (7)
86 #define COMMAND_OFFSET (7)
88 #define CONTROL_OFFSET (2)
89 #define ALTSTAT_OFFSET (2)
91 #define SELECT_DEV_BIT 0x10
92 #define CONTROL_RST_BIT 0x04
93 #define CONTROL_IEN_BIT 0x02
94 #define STATUS_BSY_BIT 0x80
95 #define STATUS_DRDY_BIT 0x40
96 #define STATUS_DRQ_BIT 0x08
97 #define STATUS_SEEK_BIT 0x10
98 #define STATUS_DF_BIT 0x20
99 #define DRIVE_LBA_BIT 0x40
104 typedef struct CommandReg {
122 typedef enum Events {
132 typedef enum DevAction {
143 ACT_DATA_WRITE_SHORT,
150 typedef enum DevState {
162 // PIO data-in (data to host)
167 // PIO data-out (data from host)
169 Data_Ready_INTRQ_Out,
177 typedef enum DmaState {
183 class PhysicalMemory;
187 * IDE Disk device model
189 class IdeDisk : public SimObject
192 /** The IDE controller for this disk. */
194 /** The DMA interface to use for transfers */
195 DMAInterface<Bus> *dmaInterface;
196 /** The image that contains the data of this disk. */
198 /** Pointer to physical memory for DMA transfers */
199 PhysicalMemory *physmem;
202 /** The disk delay in microseconds. */
206 /** Drive identification structure for this disk */
207 struct hd_driveid driveID;
208 /** Data buffer for transfers */
210 /** Number of bytes in command data transfer */
212 /** Number of bytes left in command data transfer */
213 uint32_t cmdBytesLeft;
214 /** Number of bytes left in DRQ block */
215 uint32_t drqBytesLeft;
216 /** Current sector in access */
218 /** Command block registers */
220 /** Status register */
222 /** Interrupt enable bit */
228 /** Dma transaction is a read */
230 /** PRD table base address */
233 PrdTableEntry curPrd;
234 /** Number of bytes transfered by DMA interface for current transfer */
235 uint32_t dmaInterfaceBytes;
236 /** Device ID (master=0/slave=1) */
238 /** Interrupt pending */
243 * Create and initialize this Disk.
244 * @param name The name of this disk.
245 * @param img The disk image of this disk.
246 * @param phys Pointer to physical memory
247 * @param id The disk ID (master=0/slave=1)
248 * @param disk_delay The disk delay in milliseconds
250 IdeDisk(const std::string &name, DiskImage *img, PhysicalMemory *phys,
251 int id, int disk_delay);
254 * Delete the data buffer.
259 * Reset the device state
264 * Set the controller for this device
265 * @param c The IDE controller
267 void setController(IdeController *c, DMAInterface<Bus> *dmaIntr) {
268 if (ctrl) panic("Cannot change the controller once set!\n");
270 dmaInterface = dmaIntr;
273 // Device register read/write
274 void read(const Addr &offset, bool byte, bool cmdBlk, uint8_t *data);
275 void write(const Addr &offset, bool byte, bool cmdBlk, const uint8_t *data);
277 // Start/abort functions
278 void startDma(const uint32_t &prdTableBase);
284 // Interrupt management
289 void doDmaTransfer();
290 friend class EventWrapper<IdeDisk, &IdeDisk::doDmaTransfer>;
291 EventWrapper<IdeDisk, &IdeDisk::doDmaTransfer> dmaTransferEvent;
294 friend class EventWrapper<IdeDisk, &IdeDisk::doDmaRead>;
295 EventWrapper<IdeDisk, &IdeDisk::doDmaRead> dmaReadWaitEvent;
298 friend class EventWrapper<IdeDisk, &IdeDisk::doDmaWrite>;
299 EventWrapper<IdeDisk, &IdeDisk::doDmaWrite> dmaWriteWaitEvent;
301 void dmaPrdReadDone();
302 friend class EventWrapper<IdeDisk, &IdeDisk::dmaPrdReadDone>;
303 EventWrapper<IdeDisk, &IdeDisk::dmaPrdReadDone> dmaPrdReadEvent;
306 friend class EventWrapper<IdeDisk, &IdeDisk::dmaReadDone>;
307 EventWrapper<IdeDisk, &IdeDisk::dmaReadDone> dmaReadEvent;
310 friend class EventWrapper<IdeDisk, &IdeDisk::dmaWriteDone>;
311 EventWrapper<IdeDisk, &IdeDisk::dmaWriteDone> dmaWriteEvent;
313 // Disk image read/write
314 void readDisk(uint32_t sector, uint8_t *data);
315 void writeDisk(uint32_t sector, uint8_t *data);
317 // State machine management
318 void updateState(DevAction_t action);
321 bool isBSYSet() { return (status & STATUS_BSY_BIT); }
322 bool isIENSet() { return nIENBit; }
323 bool isDEVSelect() { return ((cmdReg.drive & SELECT_DEV_BIT) == devID); }
327 // clear out the status byte
330 status |= STATUS_DRDY_BIT;
332 status |= STATUS_SEEK_BIT;
335 uint32_t getLBABase()
337 return (Addr)(((cmdReg.head & 0xf) << 24) | (cmdReg.cyl_high << 16) |
338 (cmdReg.cyl_low << 8) | (cmdReg.sec_num));
341 inline Addr pciToDma(Addr pciAddr);
343 uint32_t bytesInDmaPage(Addr curAddr, uint32_t bytesLeft);
346 * Serialize this object to the given output stream.
347 * @param os The stream to serialize to.
349 void serialize(std::ostream &os);
352 * Reconstruct the state of this object from a checkpoint.
353 * @param cp The checkpoint to use.
354 * @param section The section name describing this object.
356 void unserialize(Checkpoint *cp, const std::string §ion);
360 #endif // __IDE_DISK_HH__