dev/ide_disk.hh

   1 /*
   2  * Copyright (c) 2003 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  */
  28
  29 /** @file
  30  * Device model for an IDE disk
  31  */
  32
  33 #ifndef __IDE_DISK_HH__
  34 #define __IDE_DISK_HH__
  35
  36 #include "dev/ide.hh"
  37 #include "dev/disk_image.hh"
  38 #include "dev/io_device.hh"
  39 #include "sim/eventq.hh"
  40
  41 #define DMA_BACKOFF_PERIOD 200
  42
  43 #define MAX_DMA_SIZE (16384)
  44 #define MAX_MULTSECT (32)
  45
  46 #define PRD_BASE_MASK  0xfffffffe
  47 #define PRD_COUNT_MASK 0xfffe
  48 #define PRD_EOT_MASK   0x8000
  49
  50 typedef struct PrdEntry {
  51     uint32_t baseAddr;
  52     uint16_t byteCount;
  53     uint16_t endOfTable;
  54 } PrdEntry_t;
  55
  56 class PrdTableEntry {
  57   public:
  58     PrdEntry_t entry;
  59
  60     uint32_t getBaseAddr()
  61     {
  62         return (entry.baseAddr & PRD_BASE_MASK);
  63     }
  64
  65     uint16_t getByteCount()
  66     {
  67         return ((entry.byteCount == 0) ? MAX_DMA_SIZE :
  68                 (entry.byteCount & PRD_COUNT_MASK));
  69     }
  70
  71     uint16_t getEOT()
  72     {
  73         return (entry.endOfTable & PRD_EOT_MASK);
  74     }
  75 };
  76
  77 #define DATA_OFFSET     (0)
  78 #define ERROR_OFFSET    (1)
  79 #define FEATURES_OFFSET (1)
  80 #define NSECTOR_OFFSET  (2)
  81 #define SECTOR_OFFSET   (3)
  82 #define LCYL_OFFSET     (4)
  83 #define HCYL_OFFSET     (5)
  84 #define SELECT_OFFSET   (6)
  85 #define STATUS_OFFSET   (7)
  86 #define COMMAND_OFFSET  (7)
  87
  88 #define CONTROL_OFFSET  (2)
  89 #define ALTSTAT_OFFSET  (2)
  90
  91 #define SELECT_DEV_BIT  0x10
  92 #define CONTROL_RST_BIT 0x04
  93 #define CONTROL_IEN_BIT 0x02
  94 #define STATUS_BSY_BIT  0x80
  95 #define STATUS_DRDY_BIT 0x40
  96 #define STATUS_DRQ_BIT  0x08
  97 #define DRIVE_LBA_BIT  0x40
  98
  99 #define DEV0 (0)
 100 #define DEV1 (1)
 101
 102 typedef struct CommandReg {
 103     uint8_t data0;
 104     union {
 105         uint8_t data1;
 106         uint8_t error;
 107         uint8_t features;
 108     };
 109     uint8_t sec_count;
 110     uint8_t sec_num;
 111     uint8_t cyl_low;
 112     uint8_t cyl_high;
 113     union {
 114         uint8_t drive;
 115         uint8_t head;
 116     };
 117     union {
 118         uint8_t status;
 119         uint8_t command;
 120     };
 121 } CommandReg_t;
 122
 123 typedef enum DevAction {
 124     ACT_NONE = 0,
 125     ACT_CMD_WRITE,
 126     ACT_CMD_COMPLETE,
 127     ACT_CMD_ERROR,
 128     ACT_STAT_READ,
 129     ACT_DATA_READY,
 130     ACT_DATA_READ_BYTE,
 131     ACT_DATA_READ_SHORT,
 132     ACT_DATA_WRITE_BYTE,
 133     ACT_DATA_WRITE_SHORT,
 134     ACT_DMA_READY,
 135     ACT_DMA_DONE
 136 } DevAction_t;
 137
 138 typedef enum DevState {
 139     // Device idle
 140     Device_Idle_S = 0,
 141     Device_Idle_SI,
 142     Device_Idle_NS,
 143
 144     // Non-data commands
 145     Command_Execution,
 146
 147     // PIO data-in (data to host)
 148     Prepare_Data_In,
 149     Data_Ready_INTRQ_In,
 150     Transfer_Data_In,
 151
 152     // PIO data-out (data from host)
 153     Prepare_Data_Out,
 154     Data_Ready_INTRQ_Out,
 155     Transfer_Data_Out,
 156
 157     // DMA protocol
 158     Prepare_Data_Dma,
 159     Transfer_Data_Dma
 160 } DevState_t;
 161
 162 typedef enum DmaState {
 163     Dma_Idle = 0,
 164     Dma_Start,
 165     Dma_Transfer
 166 } DmaState_t;
 167
 168 class PhysicalMemory;
 169 class IdeController;
 170
 171 /**
 172  * IDE Disk device model
 173  */
 174 class IdeDisk : public SimObject
 175 {
 176   protected:
 177     /** The IDE controller for this disk. */
 178     IdeController *ctrl;
 179     /** The DMA interface to use for transfers */
 180     DMAInterface<Bus> *dmaInterface;
 181     /** The image that contains the data of this disk. */
 182     DiskImage *image;
 183     /** Pointer to physical memory for DMA transfers */
 184     PhysicalMemory *physmem;
 185
 186   protected:
 187     /** The disk delay in milliseconds. */
 188     int diskDelay;
 189
 190   private:
 191     /** Drive identification structure for this disk */
 192     struct hd_driveid driveID;
 193     /** Data buffer for transfers */
 194     uint8_t *dataBuffer;
 195     /** Number of bytes left in command data transfer */
 196     uint32_t cmdBytesLeft;
 197     /** Number of bytes left in DRQ block */
 198     uint32_t drqBytesLeft;
 199     /** Current sector in access */
 200     uint32_t curSector;
 201     /** Command block registers */
 202     CommandReg_t cmdReg;
 203     /** Shadow of the current command code */
 204     uint8_t curCommand;
 205     /** Interrupt enable bit */
 206     bool nIENBit;
 207     /** Device state */
 208     DevState_t devState;
 209     /** Dma state */
 210     DmaState_t dmaState;
 211     /** Dma transaction is a read */
 212     bool dmaRead;
 213     /** PRD table base address */
 214     uint32_t curPrdAddr;
 215     /** PRD entry */
 216     PrdTableEntry curPrd;
 217     /** Device ID (master=0/slave=1) */
 218     int devID;
 219     /** Interrupt pending */
 220     bool intrPending;
 221
 222   public:
 223     /**
 224      * Create and initialize this Disk.
 225      * @param name The name of this disk.
 226      * @param img The disk image of this disk.
 227      * @param phys Pointer to physical memory
 228      * @param id The disk ID (master=0/slave=1)
 229      * @param disk_delay The disk delay in milliseconds
 230      */
 231     IdeDisk(const std::string &name, DiskImage *img, PhysicalMemory *phys,
 232             int id, int disk_delay);
 233
 234     /**
 235      * Delete the data buffer.
 236      */
 237     ~IdeDisk();
 238
 239     /**
 240      * Set the controller for this device
 241      * @param c The IDE controller
 242      */
 243     void setController(IdeController *c, DMAInterface<Bus> *dmaIntr) {
 244         if (ctrl) panic("Cannot change the controller once set!\n");
 245         ctrl = c;
 246         dmaInterface = dmaIntr;
 247     }
 248
 249     // Device register read/write
 250     void read(const Addr &offset, bool byte, bool cmdBlk, uint8_t *data);
 251     void write(const Addr &offset, bool byte, bool cmdBlk, const uint8_t *data);
 252
 253     // Start/abort functions
 254     void startDma(const uint32_t &prdTableBase);
 255     void abortDma();
 256
 257   private:
 258     void startCommand();
 259
 260     // Interrupt management
 261     void intrPost();
 262     void intrClear();
 263
 264     // DMA stuff
 265     void doDmaTransfer();
 266     friend class EventWrapper<IdeDisk, &IdeDisk::doDmaTransfer>;
 267     EventWrapper<IdeDisk, &IdeDisk::doDmaTransfer> dmaTransferEvent;
 268
 269     void doDmaRead();
 270     friend class EventWrapper<IdeDisk, &IdeDisk::doDmaRead>;
 271     EventWrapper<IdeDisk, &IdeDisk::doDmaRead> dmaReadWaitEvent;
 272
 273     void doDmaWrite();
 274     friend class EventWrapper<IdeDisk, &IdeDisk::doDmaWrite>;
 275     EventWrapper<IdeDisk, &IdeDisk::doDmaWrite> dmaWriteWaitEvent;
 276
 277     void dmaPrdReadDone();
 278     friend class EventWrapper<IdeDisk, &IdeDisk::dmaPrdReadDone>;
 279     EventWrapper<IdeDisk, &IdeDisk::dmaPrdReadDone> dmaPrdReadEvent;
 280
 281     void dmaReadDone();
 282     friend class EventWrapper<IdeDisk, &IdeDisk::dmaReadDone>;
 283     EventWrapper<IdeDisk, &IdeDisk::dmaReadDone> dmaReadEvent;
 284
 285     void dmaWriteDone();
 286     friend class EventWrapper<IdeDisk, &IdeDisk::dmaWriteDone>;
 287     EventWrapper<IdeDisk, &IdeDisk::dmaWriteDone> dmaWriteEvent;
 288
 289     // Disk image read/write
 290     void readDisk(uint32_t sector, uint8_t *data);
 291     void writeDisk(uint32_t sector, uint8_t *data);
 292
 293     // State machine management
 294     void updateState(DevAction_t action);
 295
 296     // Utility functions
 297     bool isBSYSet() { return (cmdReg.status & STATUS_BSY_BIT); }
 298     bool isIENSet() { return nIENBit; }
 299     bool isDEVSelect() { return ((cmdReg.drive & SELECT_DEV_BIT) == devID); }
 300
 301     void setComplete()
 302     {
 303         // clear out the status byte
 304         cmdReg.status = 0;
 305
 306         // set the DRDY bit
 307         cmdReg.status |= STATUS_DRDY_BIT;
 308     }
 309
 310     uint32_t getLBABase()
 311     {
 312         return  (Addr)(((cmdReg.head & 0xf) << 24) | (cmdReg.cyl_high << 16) |
 313                        (cmdReg.cyl_low << 8) | (cmdReg.sec_num));
 314     }
 315
 316     /**
 317      * Serialize this object to the given output stream.
 318      * @param os The stream to serialize to.
 319      */
 320     void serialize(std::ostream &os);
 321
 322     /**
 323      * Reconstruct the state of this object from a checkpoint.
 324      * @param cp The checkpoint to use.
 325      * @param section The section name describing this object.
 326      */
 327     void unserialize(Checkpoint *cp, const std::string &section);
 328 };
 329
 330
 331 #endif // __IDE_DISK_HH__