dev/pciconfigall.cc

   1 /*
   2  * Copyright (c) 2004-2005 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  */
  28
  29 /* @file
  30  * PCI Configspace implementation
  31  */
  32
  33 #include <deque>
  34 #include <string>
  35 #include <vector>
  36 #include <bitset>
  37
  38 #include "base/trace.hh"
  39 #include "dev/pciconfigall.hh"
  40 //#include "dev/pcidev.hh"
  41 #include "dev/pcireg.h"
  42 #include "dev/platform.hh"
  43 #include "mem/packet.hh"
  44 #include "sim/builder.hh"
  45 #include "sim/system.hh"
  46
  47 using namespace std;
  48
  49 PciConfigAll::PciConfigAll(Params *p)
  50     : BasicPioDevice(p)
  51 {
  52     pioSize = 0xffffff;
  53
  54     // Set backpointer for pci config. Really the config stuff should be able to
  55     // automagically do this
  56     p->platform->pciconfig = this;
  57
  58     // Make all the pointers to devices null
  59     for(int x=0; x < MAX_PCI_DEV; x++)
  60         for(int y=0; y < MAX_PCI_FUNC; y++)
  61             devices[x][y] = NULL;
  62 }
  63
  64 // If two interrupts share the same line largely bad things will happen.
  65 // Since we don't track how many times an interrupt was set and correspondingly
  66 // cleared two devices on the same interrupt line and assert and deassert each
  67 // others interrupt "line". Interrupts will not work correctly.
  68 void
  69 PciConfigAll::startup()
  70 {
  71 /*    bitset<256> intLines;
  72     PciDev *tempDev;
  73     uint8_t intline;
  74
  75     for (int x = 0; x < MAX_PCI_DEV; x++) {
  76         for (int y = 0; y < MAX_PCI_FUNC; y++) {
  77            if (devices[x][y] != NULL) {
  78                tempDev = devices[x][y];
  79                intline = tempDev->interruptLine();
  80                if (intLines.test(intline))
  81                    warn("Interrupt line %#X is used multiple times"
  82                         "(You probably want to fix this).\n", (uint32_t)intline);
  83                else
  84                    intLines.set(intline);
  85            } // devices != NULL
  86         } // PCI_FUNC
  87     } // PCI_DEV
  88   */
  89 }
  90
  91 Tick
  92 PciConfigAll::read(Packet &pkt)
  93 {
  94     assert(pkt.result == Unknown);
  95     assert(pkt.addr >= pioAddr && pkt.addr < pioAddr + pioSize);
  96
  97     Addr daddr = pkt.addr - pioAddr;
  98     int device = (daddr >> 11) & 0x1F;
  99     int func = (daddr >> 8) & 0x7;
 100     //int reg = daddr & 0xFF;
 101
 102     pkt.time = curTick + pioDelay;
 103
 104     DPRINTF(PciConfigAll, "read  va=%#x da=%#x size=%d\n", pkt.addr, daddr,
 105             pkt.size);
 106
 107     uint8_t *data8;
 108     uint16_t *data16;
 109     uint32_t *data32;
 110
 111     switch (pkt.size) {
 112 /*      case sizeof(uint64_t):
 113          if (!pkt.data) {
 114              data64 = new uint64_t;
 115              pkt.data = (uint8_t*)data64;
 116          } else {
 117              data64 = (uint64_t*)pkt.data;
 118          }
 119          if (devices[device][func] == NULL)
 120              *data64 = 0xFFFFFFFFFFFFFFFFULL;
 121          else
 122              devices[device][func]->readConfig(reg, req.size, data64);
 123          break;*/
 124       case sizeof(uint32_t):
 125          if (!pkt.data) {
 126              data32 = new uint32_t;
 127              pkt.data = (uint8_t*)data32;
 128          } else {
 129              data32 = (uint32_t*)pkt.data;
 130          }
 131          if (devices[device][func] == NULL)
 132              *data32 = 0xFFFFFFFF;
 133          else
 134              ;//devices[device][func]->readConfig(reg, req.size, data32);
 135          break;
 136       case sizeof(uint16_t):
 137          if (!pkt.data) {
 138              data16 = new uint16_t;
 139              pkt.data = (uint8_t*)data16;
 140          } else {
 141              data16 = (uint16_t*)pkt.data;
 142          }
 143          if (devices[device][func] == NULL)
 144              *data16 = 0xFFFF;
 145          else
 146              ;//devices[device][func]->readConfig(reg, req.size, data16);
 147          break;
 148       case sizeof(uint8_t):
 149          if (!pkt.data) {
 150              data8 = new uint8_t;
 151              pkt.data = data8;
 152          } else {
 153              data8 = (uint8_t*)pkt.data;
 154          }
 155          if (devices[device][func] == NULL)
 156              *data8 = 0xFF;
 157          else
 158              ;//devices[device][func]->readConfig(reg, req.size, data8);
 159          break;
 160       default:
 161         panic("invalid access size(?) for PCI configspace!\n");
 162     }
 163     pkt.result = Success;
 164     return pioDelay;
 165 }
 166
 167 Tick
 168 PciConfigAll::write(Packet &pkt)
 169 {
 170     pkt.time = curTick + pioDelay;
 171
 172     assert(pkt.result == Unknown);
 173     assert(pkt.addr >= pioAddr && pkt.addr < pioAddr + pioSize);
 174     assert(pkt.size == sizeof(uint8_t) || pkt.size == sizeof(uint16_t) ||
 175             pkt.size == sizeof(uint32_t));
 176     Addr daddr = pkt.addr - pioAddr;
 177
 178     int device = (daddr >> 11) & 0x1F;
 179     int func = (daddr >> 8) & 0x7;
 180 //    int reg = daddr & 0xFF;
 181
 182     if (devices[device][func] == NULL)
 183         panic("Attempting to write to config space on non-existant device\n");
 184
 185     DPRINTF(PciConfigAll, "write - va=%#x size=%d data=%#x\n",
 186             pkt.addr, pkt.size, *(uint32_t*)pkt.data);
 187
 188 //    devices[device][func]->writeConfig(reg, req->size, data);
 189
 190     return pioDelay;
 191 }
 192
 193 void
 194 PciConfigAll::serialize(std::ostream &os)
 195 {
 196     /*
 197      * There is no state associated with this object that requires
 198      * serialization.  The only real state are the device pointers
 199      * which are all setup by the constructor of the PciDev class
 200      */
 201 }
 202
 203 void
 204 PciConfigAll::unserialize(Checkpoint *cp, const std::string &section)
 205 {
 206     /*
 207      * There is no state associated with this object that requires
 208      * serialization.  The only real state are the device pointers
 209      * which are all setup by the constructor of the PciDev class
 210      */
 211 }
 212
 213 #ifndef DOXYGEN_SHOULD_SKIP_THIS
 214
 215 BEGIN_DECLARE_SIM_OBJECT_PARAMS(PciConfigAll)
 216
 217     Param<Addr> pio_addr;
 218     Param<Tick> pio_latency;
 219     SimObjectParam<Platform *> platform;
 220     SimObjectParam<System *> system;
 221
 222 END_DECLARE_SIM_OBJECT_PARAMS(PciConfigAll)
 223
 224 BEGIN_INIT_SIM_OBJECT_PARAMS(PciConfigAll)
 225
 226     INIT_PARAM(pio_addr, "Device Address"),
 227     INIT_PARAM(pio_latency, "Programmed IO latency"),
 228     INIT_PARAM(platform, "platform"),
 229     INIT_PARAM(system, "system object")
 230
 231 END_INIT_SIM_OBJECT_PARAMS(PciConfigAll)
 232
 233 CREATE_SIM_OBJECT(PciConfigAll)
 234 {
 235     BasicPioDevice::Params *p = new BasicPioDevice::Params;
 236     p->pio_addr = pio_addr;
 237     p->pio_delay = pio_latency;
 238     p->platform = platform;
 239     p->system = system;
 240     return new PciConfigAll(p);
 241 }
 242
 243 REGISTER_SIM_OBJECT("PciConfigAll", PciConfigAll)
 244
 245 #endif // DOXYGEN_SHOULD_SKIP_THIS