dev/pciconfigall.hh

   1 /*
   2  * Copyright (c) 2003 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  */
  28
  29 /*
  30  * @file
  31  * PCI Config space implementation.
  32  */
  33
  34 #ifndef __PCICONFIGALL_HH__
  35 #define __PCICONFIGALL_HH__
  36
  37 #include "mem/functional_mem/functional_memory.hh"
  38 #include "dev/pcireg.h"
  39
  40 static const uint32_t MAX_PCI_DEV = 32;
  41 static const uint32_t MAX_PCI_FUNC = 8;
  42
  43 class PciDev;
  44
  45 /**
  46  * PCI Config Space
  47  * All of PCI config space needs to return -1 on Tsunami, except
  48  * the devices that exist. This device maps the entire bus config
  49  * space and passes the requests on to TsunamiPCIDev devices as
  50  * appropriate.
  51  */
  52 class PciConfigAll : public FunctionalMemory
  53 {
  54   private:
  55     Addr addr;
  56     static const Addr size = 0xffffff;
  57
  58     /**
  59       * Pointers to all the devices that are registered with this
  60       * particular config space.
  61       */
  62     PciDev* devices[MAX_PCI_DEV][MAX_PCI_FUNC];
  63
  64   public:
  65     /**
  66      * Constructor for PCIConfigAll
  67      * @param name name of the object
  68      * @param a base address of the write
  69      * @param mmu the memory controller
  70      */
  71     PciConfigAll(const std::string &name, Addr a, MemoryController *mmu);
  72
  73
  74     /**
  75      * Check if a device exists.
  76      * @param pcidev PCI device to check
  77      * @param pcifunc PCI function to check
  78      * @return true if device exists, false otherwise
  79      */
  80     bool deviceExists(uint32_t pcidev, uint32_t pcifunc)
  81                      { return devices[pcidev][pcifunc] != NULL ? true : false; }
  82
  83     /**
  84      * Registers a device with the config space object.
  85      * @param pcidev PCI device to register
  86      * @param pcifunc PCI function to register
  87      * @param device device to register
  88      */
  89     void registerDevice(uint8_t pcidev, uint8_t pcifunc, PciDev *device)
  90                         { devices[pcidev][pcifunc] = device; }
  91
  92     /**
  93      * Read something in PCI config space. If the device does not exist
  94      * -1 is returned, if the device does exist its PciDev::ReadConfig (or the
  95      * virtual function that overrides) it is called.
  96      * @param req Contains the address of the field to read.
  97      * @param data Return the field read.
  98      * @return The fault condition of the access.
  99      */
 100     virtual Fault read(MemReqPtr &req, uint8_t *data);
 101
 102     /**
 103      * Write to PCI config spcae. If the device does not exit the simulator
 104      * panics. If it does it is passed on the PciDev::WriteConfig (or the virtual
 105      * function that overrides it).
 106      * @param req Contains the address to write to.
 107      * @param data The data to write.
 108      * @return The fault condition of the access.
 109      */
 110
 111     virtual Fault write(MemReqPtr &req, const uint8_t *data);
 112
 113     /**
 114      * Serialize this object to the given output stream.
 115      * @param os The stream to serialize to.
 116      */
 117     virtual void serialize(std::ostream &os);
 118
 119     /**
 120      * Reconstruct the state of this object from a checkpoint.
 121      * @param cp The checkpoint use.
 122      * @param section The section name of this object
 123      */
 124     virtual void unserialize(Checkpoint *cp, const std::string &section);
 125
 126 };
 127
 128 #endif // __PCICONFIGALL_HH__