2 * Copyright (c) 2004 The Regents of The University of Michigan
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 * PCI Config space implementation.
34 #ifndef __PCICONFIGALL_HH__
35 #define __PCICONFIGALL_HH__
37 #include "dev/pcireg.h"
38 #include "base/range.hh"
39 #include "dev/io_device.hh"
42 static const uint32_t MAX_PCI_DEV = 32;
43 static const uint32_t MAX_PCI_FUNC = 8;
49 * All of PCI config space needs to return -1 on Tsunami, except
50 * the devices that exist. This device maps the entire bus config
51 * space and passes the requests on to TsunamiPCIDev devices as
54 class PciConfigAll : public PioDevice
58 static const Addr size = 0xffffff;
61 * Pointers to all the devices that are registered with this
62 * particular config space.
64 PciDev* devices[MAX_PCI_DEV][MAX_PCI_FUNC];
68 * Constructor for PCIConfigAll
69 * @param name name of the object
70 * @param a base address of the write
71 * @param mmu the memory controller
72 * @param hier object to store parameters universal the device hierarchy
73 * @param bus The bus that this device is attached to
75 PciConfigAll(const std::string &name, Addr a, MemoryController *mmu,
76 HierParams *hier, Bus *bus, Tick pio_latency);
80 * Check if a device exists.
81 * @param pcidev PCI device to check
82 * @param pcifunc PCI function to check
83 * @return true if device exists, false otherwise
85 bool deviceExists(uint32_t pcidev, uint32_t pcifunc)
86 { return devices[pcidev][pcifunc] != NULL ? true : false; }
89 * Registers a device with the config space object.
90 * @param pcidev PCI device to register
91 * @param pcifunc PCI function to register
92 * @param device device to register
94 void registerDevice(uint8_t pcidev, uint8_t pcifunc, PciDev *device)
95 { devices[pcidev][pcifunc] = device; }
98 * Read something in PCI config space. If the device does not exist
99 * -1 is returned, if the device does exist its PciDev::ReadConfig (or the
100 * virtual function that overrides) it is called.
101 * @param req Contains the address of the field to read.
102 * @param data Return the field read.
103 * @return The fault condition of the access.
105 virtual Fault read(MemReqPtr &req, uint8_t *data);
108 * Write to PCI config spcae. If the device does not exit the simulator
109 * panics. If it does it is passed on the PciDev::WriteConfig (or the virtual
110 * function that overrides it).
111 * @param req Contains the address to write to.
112 * @param data The data to write.
113 * @return The fault condition of the access.
116 virtual Fault write(MemReqPtr &req, const uint8_t *data);
119 * Start up function to check if more than one person is using an interrupt line
120 * and print a warning if such a case exists
122 virtual void startup();
125 * Serialize this object to the given output stream.
126 * @param os The stream to serialize to.
128 virtual void serialize(std::ostream &os);
131 * Reconstruct the state of this object from a checkpoint.
132 * @param cp The checkpoint use.
133 * @param section The section name of this object
135 virtual void unserialize(Checkpoint *cp, const std::string §ion);
138 * Return how long this access will take.
139 * @param req the memory request to calcuate
140 * @return Tick when the request is done
142 Tick cacheAccess(MemReqPtr &req);
146 #endif // __PCICONFIGALL_HH__