dev/pcidev.hh

   1 /*
   2  * Copyright (c) 2003 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  */
  28
  29 /* @file
  30  * PCI configspace devices
  31  */
  32
  33 #ifndef __PCI_DEV_HH__
  34 #define __PCI_DEV_HH__
  35
  36 #include "dev/pcireg.h"
  37 #include "sim/sim_object.hh"
  38 #include "mem/functional_mem/mmap_device.hh"
  39
  40 class PCIConfigAll;
  41 class MemoryController;
  42
  43 class PciConfigData : public SimObject
  44 {
  45   public:
  46     PciConfigData(const std::string &name)
  47         : SimObject(name)
  48     {
  49         memset(config.data, 0, sizeof(config.data));
  50         memset(BARAddrs, 0, sizeof(BARAddrs));
  51         memset(BARSize, 0, sizeof(BARSize));
  52     }
  53
  54     PCIConfig config;
  55     uint32_t BARSize[6];
  56     Addr BARAddrs[6];
  57 };
  58
  59 /**
  60  * PCI device, base implemnation is only config space.
  61  * Each device is connected to a PCIConfigSpace device
  62  * which returns -1 for everything but the pcidevs that
  63  * register with it. This object registers with the PCIConfig space
  64  * object.
  65  */
  66 class PciDev : public MmapDevice
  67 {
  68   protected:
  69     MemoryController *MMU;
  70     PCIConfigAll *ConfigSpace;
  71     PciConfigData *ConfigData;
  72     uint32_t Bus;
  73     uint32_t Device;
  74     uint32_t Function;
  75
  76     PCIConfig config;
  77     uint32_t BARSize[6];
  78     Addr BARAddrs[6];
  79
  80   public:
  81     PciDev(const std::string &name, MemoryController *mmu, PCIConfigAll *cf,
  82            PciConfigData *cd, uint32_t bus, uint32_t dev, uint32_t func);
  83
  84     virtual Fault read(MemReqPtr &req, uint8_t *data) {
  85         return No_Fault;
  86     }
  87     virtual Fault write(MemReqPtr &req, const uint8_t *data) {
  88         return No_Fault;
  89     }
  90
  91     virtual void WriteConfig(int offset, int size, uint32_t data);
  92     virtual void ReadConfig(int offset, int size, uint8_t *data);
  93
  94     virtual void serialize(std::ostream &os);
  95     virtual void unserialize(Checkpoint *cp, const std::string &section);
  96 };
  97
  98 #endif // __PCI_DEV_HH__