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30 * Interface for devices using PCI configuration
33 #ifndef __DEV_PCIDEV_HH__
34 #define __DEV_PCIDEV_HH__
36 #include "dev/io_device.hh"
37 #include "dev/pcireg.h"
38 #include "dev/platform.hh"
40 #define BAR_IO_MASK 0x3
41 #define BAR_MEM_MASK 0xF
42 #define BAR_IO_SPACE_BIT 0x1
43 #define BAR_IO_SPACE(x) ((x) & BAR_IO_SPACE_BIT)
44 #define BAR_NUMBER(x) (((x) - PCI0_BASE_ADDR0) >> 0x2);
47 class MemoryController;
51 * This class encapulates the first 64 bytes of a singles PCI
52 * devices config space that in configured by the configuration file.
54 class PciConfigData : public SimObject
58 * Constructor to initialize the devices config space to 0.
60 PciConfigData(const std::string &name)
63 memset(config.data, 0, sizeof(config.data));
64 memset(BARAddrs, 0, sizeof(BARAddrs));
65 memset(BARSize, 0, sizeof(BARSize));
68 /** The first 64 bytes */
71 /** The size of the BARs */
74 /** The addresses of the BARs */
79 * PCI device, base implemnation is only config space.
80 * Each device is connected to a PCIConfigSpace device
81 * which returns -1 for everything but the pcidevs that
82 * register with it. This object registers with the PCIConfig space
85 class PciDev : public DmaDevice
92 MemoryController *mmu;
95 * A pointer to the configspace all object that calls us when
96 * a read comes to this particular device/function.
98 PciConfigAll *configSpace;
101 * A pointer to the object that contains the first 64 bytes of
104 PciConfigData *configData;
106 /** The bus number we are on */
109 /** The device number we have */
112 /** The function number */
113 uint32_t functionNum;
120 const Params *params() const { return _params; }
123 /** The current config space. Unlike the PciConfigData this is
124 * updated during simulation while continues to reflect what was
125 * in the config file.
129 /** The size of the BARs */
132 /** The current address mapping of the BARs */
136 isBAR(Addr addr, int bar) const
138 assert(bar >= 0 && bar < 6);
139 return BARAddrs[bar] <= addr && addr < BARAddrs[bar] + BARSize[bar];
145 for (int i = 0; i <= 5; ++i)
153 getBAR(Addr paddr, Addr &daddr, int &bar)
155 int b = getBAR(paddr);
159 daddr = paddr - BARAddrs[b];
166 PciConfigData *configData;
169 Addr pciToDma(Addr pciAddr) const
170 { return plat->pciToDma(pciAddr); }
174 { plat->postPciInt(configData->config.interruptLine); }
178 { plat->clearPciInt(configData->config.interruptLine); }
182 { return configData->config.interruptLine; }
186 * Constructor for PCI Dev. This function copies data from the
187 * config file object PCIConfigData and registers the device with
188 * a PciConfigAll object.
190 PciDev(Params *params);
192 virtual Fault read(MemReqPtr &req, uint8_t *data);
193 virtual Fault write(MemReqPtr &req, const uint8_t *data);
197 * Implement the read/write as BAR accesses
199 Fault readBar(MemReqPtr &req, uint8_t *data);
200 Fault writeBar(MemReqPtr &req, const uint8_t *data);
204 * Read from a specific BAR
206 virtual Fault readBar0(MemReqPtr &req, Addr daddr, uint8_t *data);
207 virtual Fault readBar1(MemReqPtr &req, Addr daddr, uint8_t *data);
208 virtual Fault readBar2(MemReqPtr &req, Addr daddr, uint8_t *data);
209 virtual Fault readBar3(MemReqPtr &req, Addr daddr, uint8_t *data);
210 virtual Fault readBar4(MemReqPtr &req, Addr daddr, uint8_t *data);
211 virtual Fault readBar5(MemReqPtr &req, Addr daddr, uint8_t *data);
215 * Write to a specific BAR
217 virtual Fault writeBar0(MemReqPtr &req, Addr daddr, const uint8_t *data);
218 virtual Fault writeBar1(MemReqPtr &req, Addr daddr, const uint8_t *data);
219 virtual Fault writeBar2(MemReqPtr &req, Addr daddr, const uint8_t *data);
220 virtual Fault writeBar3(MemReqPtr &req, Addr daddr, const uint8_t *data);
221 virtual Fault writeBar4(MemReqPtr &req, Addr daddr, const uint8_t *data);
222 virtual Fault writeBar5(MemReqPtr &req, Addr daddr, const uint8_t *data);
226 * Write to the PCI config space data that is stored locally. This may be
227 * overridden by the device but at some point it will eventually call this
228 * for normal operations that it does not need to override.
229 * @param offset the offset into config space
230 * @param size the size of the write
231 * @param data the data to write
233 virtual void writeConfig(int offset, int size, const uint8_t* data);
237 * Read from the PCI config space data that is stored locally. This may be
238 * overridden by the device but at some point it will eventually call this
239 * for normal operations that it does not need to override.
240 * @param offset the offset into config space
241 * @param size the size of the read
242 * @param data pointer to the location where the read value should be stored
244 virtual void readConfig(int offset, int size, uint8_t *data);
247 * Serialize this object to the given output stream.
248 * @param os The stream to serialize to.
250 virtual void serialize(std::ostream &os);
253 * Reconstruct the state of this object from a checkpoint.
254 * @param cp The checkpoint use.
255 * @param section The section name of this object
257 virtual void unserialize(Checkpoint *cp, const std::string §ion);
261 PciDev::readBar(MemReqPtr &req, uint8_t *data)
263 if (isBAR(req->paddr, 0))
264 return readBar0(req, req->paddr - BARAddrs[0], data);
265 if (isBAR(req->paddr, 1))
266 return readBar1(req, req->paddr - BARAddrs[1], data);
267 if (isBAR(req->paddr, 2))
268 return readBar2(req, req->paddr - BARAddrs[2], data);
269 if (isBAR(req->paddr, 3))
270 return readBar3(req, req->paddr - BARAddrs[3], data);
271 if (isBAR(req->paddr, 4))
272 return readBar4(req, req->paddr - BARAddrs[4], data);
273 if (isBAR(req->paddr, 5))
274 return readBar5(req, req->paddr - BARAddrs[5], data);
275 return Machine_Check_Fault;
279 PciDev::writeBar(MemReqPtr &req, const uint8_t *data)
281 if (isBAR(req->paddr, 0))
282 return writeBar0(req, req->paddr - BARAddrs[0], data);
283 if (isBAR(req->paddr, 1))
284 return writeBar1(req, req->paddr - BARAddrs[1], data);
285 if (isBAR(req->paddr, 2))
286 return writeBar2(req, req->paddr - BARAddrs[2], data);
287 if (isBAR(req->paddr, 3))
288 return writeBar3(req, req->paddr - BARAddrs[3], data);
289 if (isBAR(req->paddr, 4))
290 return writeBar4(req, req->paddr - BARAddrs[4], data);
291 if (isBAR(req->paddr, 5))
292 return writeBar5(req, req->paddr - BARAddrs[5], data);
293 return Machine_Check_Fault;
296 #endif // __DEV_PCIDEV_HH__