Merge saidi@zizzer:/z/m5/Bitkeeper/m5/
[gem5.git] / dev / pcidev.hh
1 /*
2 * Copyright (c) 2003 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 /* @file
30 * Interface for devices using PCI configuration
31 */
32
33 #ifndef __PCI_DEV_HH__
34 #define __PCI_DEV_HH__
35
36 #include "dev/pcireg.h"
37 #include "dev/io_device.hh"
38
39 class PciConfigAll;
40 class MemoryController;
41
42
43 /**
44 * This class encapulates the first 64 bytes of a singles PCI
45 * devices config space that in configured by the configuration file.
46 */
47 class PciConfigData : public SimObject
48 {
49 public:
50 /**
51 * Constructor to initialize the devices config space to 0.
52 */
53 PciConfigData(const std::string &name)
54 : SimObject(name)
55 {
56 memset(config.data, 0, sizeof(config.data));
57 memset(BARAddrs, 0, sizeof(BARAddrs));
58 memset(BARSize, 0, sizeof(BARSize));
59 }
60
61 /** The first 64 bytes */
62 PCIConfig config;
63
64 /** The size of the BARs */
65 uint32_t BARSize[6];
66
67 /** The addresses of the BARs */
68 Addr BARAddrs[6];
69 };
70
71 /**
72 * PCI device, base implemnation is only config space.
73 * Each device is connected to a PCIConfigSpace device
74 * which returns -1 for everything but the pcidevs that
75 * register with it. This object registers with the PCIConfig space
76 * object.
77 */
78 class PciDev : public DmaDevice
79 {
80 protected:
81 MemoryController *mmu;
82 /** A pointer to the configspace all object that calls
83 * us when a read comes to this particular device/function.
84 */
85 PciConfigAll *configSpace;
86
87 /**
88 * A pointer to the object that contains the first 64 bytes of
89 * config space
90 */
91 PciConfigData *configData;
92
93 /** The bus number we are on */
94 uint32_t busNum;
95
96 /** The device number we have */
97 uint32_t deviceNum;
98
99 /** The function number */
100 uint32_t functionNum;
101
102 /** The current config space. Unlike the PciConfigData this is updated
103 * during simulation while continues to refelect what was in the config file.
104 */
105 PCIConfig config;
106
107 /** The size of the BARs */
108 uint32_t BARSize[6];
109
110 /** The current address mapping of the BARs */
111 Addr BARAddrs[6];
112
113 public:
114 /**
115 * Constructor for PCI Dev. This function copies data from the config file
116 * object PCIConfigData and registers the device with a PciConfigAll object.
117 * @param name name of the object
118 * @param mmu a pointer to the memory controller
119 * @param cf a pointer to the config space object that this device need to
120 * register with
121 * @param cd A pointer to the config space values specified in the conig file
122 * @param bus the bus this device is on
123 * @param dev the device id of this device
124 * @param func the function number of this device
125 */
126 PciDev(const std::string &name, MemoryController *mmu, PciConfigAll *cf,
127 PciConfigData *cd, uint32_t bus, uint32_t dev, uint32_t func);
128
129 virtual Fault read(MemReqPtr &req, uint8_t *data) {
130 return No_Fault;
131 }
132 virtual Fault write(MemReqPtr &req, const uint8_t *data) {
133 return No_Fault;
134 }
135
136 /**
137 * Write to the PCI config space data that is stored locally. This may be
138 * overridden by the device but at some point it will eventually call this
139 * for normal operations that it does not need to override.
140 * @param offset the offset into config space
141 * @param size the size of the write
142 * @param data the data to write
143 */
144 virtual void WriteConfig(int offset, int size, uint32_t data);
145
146
147 /**
148 * Read from the PCI config space data that is stored locally. This may be
149 * overridden by the device but at some point it will eventually call this
150 * for normal operations that it does not need to override.
151 * @param offset the offset into config space
152 * @param size the size of the read
153 * @param data pointer to the location where the read value should be stored
154 */
155 virtual void ReadConfig(int offset, int size, uint8_t *data);
156
157 /**
158 * Serialize this object to the given output stream.
159 * @param os The stream to serialize to.
160 */
161 virtual void serialize(std::ostream &os);
162
163 /**
164 * Reconstruct the state of this object from a checkpoint.
165 * @param cp The checkpoint use.
166 * @param section The section name of this object
167 */
168 virtual void unserialize(Checkpoint *cp, const std::string &section);
169 };
170
171 #endif // __PCI_DEV_HH__