dev/sinicreg.hh

   1 /*
   2  * Copyright (c) 2004 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  */
  28
  29 #ifndef __DEV_SINICREG_HH__
  30 #define __DEV_SINICREG_HH__
  31
  32 #define __SINIC_REG32(NAME, VAL) static const uint32_t NAME = (VAL)
  33 #define __SINIC_REG64(NAME, VAL) static const uint64_t NAME = (VAL)
  34
  35 #define __SINIC_VAL32(NAME, OFFSET, WIDTH) \
  36         static const uint32_t NAME##_width = WIDTH; \
  37         static const uint32_t NAME##_offset = OFFSET; \
  38         static const uint32_t NAME##_mask = (1 << WIDTH) - 1; \
  39         static const uint32_t NAME = ((1 << WIDTH) - 1) << OFFSET; \
  40         static inline uint32_t get_##NAME(uint32_t reg) \
  41         { return (reg & NAME) >> OFFSET; } \
  42         static inline uint32_t set_##NAME(uint32_t reg, uint32_t val) \
  43         { return (reg & ~NAME) | ((val << OFFSET) & NAME); }
  44
  45 #define __SINIC_VAL64(NAME, OFFSET, WIDTH) \
  46         static const uint64_t NAME##_width = WIDTH; \
  47         static const uint64_t NAME##_offset = OFFSET; \
  48         static const uint64_t NAME##_mask = (ULL(1) << WIDTH) - 1; \
  49         static const uint64_t NAME = ((ULL(1) << WIDTH) - 1) << OFFSET; \
  50         static inline uint64_t get_##NAME(uint64_t reg) \
  51         { return (reg & NAME) >> OFFSET; } \
  52         static inline uint64_t set_##NAME(uint64_t reg, uint64_t val) \
  53         { return (reg & ~NAME) | ((val << OFFSET) & NAME); }
  54
  55 namespace Sinic {
  56 namespace Regs {
  57
  58 // Registers
  59 __SINIC_REG32(Config,      0x00); // 32: configuration register
  60 __SINIC_REG32(RxMaxCopy,   0x04); // 32: max rx copy
  61 __SINIC_REG32(TxMaxCopy,   0x08); // 32: max tx copy
  62 __SINIC_REG32(RxThreshold, 0x0c); // 32: receive fifo threshold
  63 __SINIC_REG32(TxThreshold, 0x10); // 32: transmit fifo threshold
  64 __SINIC_REG32(IntrStatus,  0x14); // 32: interrupt status
  65 __SINIC_REG32(IntrMask,    0x18); // 32: interrupt mask
  66 __SINIC_REG32(RxData,      0x20); // 64: receive data
  67 __SINIC_REG32(RxDone,      0x28); // 64: receive done
  68 __SINIC_REG32(RxWait,      0x30); // 64: receive done (busy wait)
  69 __SINIC_REG32(TxData,      0x38); // 64: transmit data
  70 __SINIC_REG32(TxDone,      0x40); // 64: transmit done
  71 __SINIC_REG32(TxWait,      0x48); // 64: transmit done (busy wait)
  72 __SINIC_REG32(HwAddr,      0x50); // 64: mac address
  73 __SINIC_REG32(Size,        0x58);
  74
  75 // Config register bits
  76 __SINIC_VAL32(Config_Reset,  31, 1); // reset chip
  77 __SINIC_VAL32(Config_Filter,  7, 1); // enable receive filter
  78 __SINIC_VAL32(Config_Vlan,    6, 1); // enable vlan tagging
  79 __SINIC_VAL32(Config_Virtual, 5, 1); // enable virtual addressing
  80 __SINIC_VAL32(Config_Desc,    4, 1); // enable tx/rx descriptors
  81 __SINIC_VAL32(Config_Poll,    3, 1); // enable polling
  82 __SINIC_VAL32(Config_IntEn,   2, 1); // enable interrupts
  83 __SINIC_VAL32(Config_TxEn,    1, 1); // enable transmit
  84 __SINIC_VAL32(Config_RxEn,    0, 1); // enable receive
  85
  86 // Interrupt register bits
  87 __SINIC_VAL32(Intr_TxFifo, 5, 1);  // Fifo oflow/uflow/threshold
  88 __SINIC_VAL32(Intr_TxData, 4, 1);  // DMA Completed w/ interrupt
  89 __SINIC_VAL32(Intr_TxDone, 3, 1);  // Packet transmitted
  90 __SINIC_VAL32(Intr_RxFifo, 2, 1); // Fifo oflow/uflow/threshold
  91 __SINIC_VAL32(Intr_RxData, 1, 1); // DMA Completed w/ interrupt
  92 __SINIC_VAL32(Intr_RxDone, 0, 1); // Packet received
  93 __SINIC_REG32(Intr_All,     0x3f);
  94 __SINIC_REG32(Intr_NoDelay, 0x24);
  95 __SINIC_REG32(Intr_Res,    ~0x3f);
  96
  97 // RX Data Description
  98 __SINIC_VAL64(RxData_Len, 40, 20); // 0 - 1M
  99 __SINIC_VAL64(RxData_Addr, 0, 40); // Address 1TB
 100
 101 // TX Data Description
 102 __SINIC_VAL64(TxData_More,     63,  1);
 103 __SINIC_VAL64(TxData_Checksum, 62,  1);
 104 __SINIC_VAL64(TxData_Len,      40, 20); // 0 - 1M
 105 __SINIC_VAL64(TxData_Addr,      0, 40); // Address 1TB
 106
 107 // RX Done/Busy Information
 108 __SINIC_VAL64(RxDone_Complete,  63,  1);
 109 __SINIC_VAL64(RxDone_IpPacket,  45,  1);
 110 __SINIC_VAL64(RxDone_TcpPacket, 44,  1);
 111 __SINIC_VAL64(RxDone_UdpPacket, 43,  1);
 112 __SINIC_VAL64(RxDone_IpError,   42,  1);
 113 __SINIC_VAL64(RxDone_TcpError,  41,  1);
 114 __SINIC_VAL64(RxDone_UdpError,  40,  1);
 115 __SINIC_VAL64(RxDone_More,      32,  1);
 116 __SINIC_VAL64(RxDone_FifoLen,   20,  8); // up to 255 packets
 117 __SINIC_VAL64(RxDone_CopyLen,    0, 20); // up to 256k
 118
 119 // TX Done/Busy Information
 120 __SINIC_VAL64(TxDone_Complete, 63,  1);
 121 __SINIC_VAL64(TxDone_FifoLen,  20,  8); // up to 255 packets
 122 __SINIC_VAL64(TxDone_CopyLen,   0, 20); // up to 256k
 123
 124 inline int
 125 regSize(int offset)
 126 {
 127     static const char sizes[] = {
 128         4,
 129         4,
 130         4,
 131         4,
 132         4,
 133         4,
 134         4,
 135         0,
 136         8, 0,
 137         8, 0,
 138         8, 0,
 139         8, 0,
 140         8, 0,
 141         8, 0,
 142         8, 0
 143     };
 144
 145     if (offset & 0x3)
 146         return 0;
 147
 148     if (offset >= Size)
 149         return 0;
 150
 151     return sizes[offset / 4];
 152 }
 153
 154 inline const char *
 155 regName(int offset)
 156 {
 157     static const char *names[] = {
 158         "Config",
 159         "RxMaxCopy",
 160         "TxMaxCopy",
 161         "RxThreshold",
 162         "TxThreshold",
 163         "IntrStatus",
 164         "IntrMask",
 165         "invalid",
 166         "RxData", "invalid",
 167         "RxDone", "invalid",
 168         "RxWait", "invalid",
 169         "TxData", "invalid",
 170         "TxDone", "invalid",
 171         "TxWait", "invalid",
 172         "HwAddr", "invalid"
 173     };
 174
 175     if (offset & 0x3)
 176         return "invalid";
 177
 178     if (offset >= Size)
 179         return "invalid";
 180
 181     return names[offset / 4];
 182 }
 183
 184 /* namespace Regs */ }
 185 /* namespace Sinic */ }
 186
 187 #endif // __DEV_SINICREG_HH__