95c6714959d9e81f13631c97b103476879c88fbb
[gem5.git] / dev / tsunami.cc
1 /*
2 * Copyright (c) 2003 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #include <deque>
30 #include <string>
31 #include <vector>
32
33 #include "cpu/intr_control.hh"
34 #include "dev/console.hh"
35 #include "dev/etherdev.hh"
36 #include "dev/scsi_ctrl.hh"
37 #include "dev/tlaser_clock.hh"
38 #include "dev/tsunami_cchip.hh"
39 #include "dev/tsunami_pchip.hh"
40 #include "dev/tsunami.hh"
41 #include "sim/builder.hh"
42 #include "sim/system.hh"
43
44 using namespace std;
45
46 Tsunami::Tsunami(const string &name, ScsiController *s, EtherDev *e,
47 TlaserClock *c, TsunamiCChip *cc, TsunamiPChip *pc, SimConsole *con,
48 IntrControl *ic, int intr_freq)
49 : SimObject(name), intctrl(ic), cons(con), scsi(s), ethernet(e),
50 clock(c), cchip(cc), pchip(pc), interrupt_frequency(intr_freq)
51 {
52 for (int i = 0; i < Tsunami::Max_CPUs; i++)
53 intr_sum_type[i] = 0;
54 }
55
56 void
57 Tsunami::serialize(std::ostream &os)
58 {
59 SERIALIZE_ARRAY(intr_sum_type, Tsunami::Max_CPUs);
60 }
61
62 void
63 Tsunami::unserialize(Checkpoint *cp, const std::string &section)
64 {
65 UNSERIALIZE_ARRAY(intr_sum_type, Tsunami::Max_CPUs);
66 }
67
68 BEGIN_DECLARE_SIM_OBJECT_PARAMS(Tsunami)
69
70 SimObjectParam<ScsiController *> scsi;
71 SimObjectParam<EtherDev *> ethernet;
72 SimObjectParam<TlaserClock *> clock;
73 SimObjectParam<TsunamiCChip *> cchip;
74 SimObjectParam<TsunamiPChip *> pchip;
75 SimObjectParam<SimConsole *> cons;
76 SimObjectParam<IntrControl *> intrctrl;
77 Param<int> interrupt_frequency;
78
79 END_DECLARE_SIM_OBJECT_PARAMS(Tsunami)
80
81 BEGIN_INIT_SIM_OBJECT_PARAMS(Tsunami)
82
83 INIT_PARAM(scsi, "scsi controller"),
84 INIT_PARAM(ethernet, "ethernet controller"),
85 INIT_PARAM(clock, "turbolaser clock"),
86 INIT_PARAM(cchip, "cchip"),
87 INIT_PARAM(pchip, "pchip"),
88 INIT_PARAM(cons, "system console"),
89 INIT_PARAM(intrctrl, "interrupt controller"),
90 INIT_PARAM_DFLT(interrupt_frequency, "frequency of interrupts", 1200)
91
92 END_INIT_SIM_OBJECT_PARAMS(Tsunami)
93
94
95 CREATE_SIM_OBJECT(Tsunami)
96 {
97 return new Tsunami(getInstanceName(), scsi, ethernet, clock,
98 cchip, pchip, cons, intrctrl, interrupt_frequency);
99 }
100
101 REGISTER_SIM_OBJECT("Tsunami", Tsunami)
102