Merge
[gem5.git] / dev / tsunami.cc
1 /*
2 * Copyright (c) 2003 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #include <deque>
30 #include <string>
31 #include <vector>
32
33 #include "cpu/intr_control.hh"
34 #include "dev/console.hh"
35 #include "dev/etherdev.hh"
36 #include "dev/scsi_ctrl.hh"
37 #include "dev/tlaser_clock.hh"
38 #include "dev/tsunami_cchip.hh"
39 #include "dev/tsunami_pchip.hh"
40 #include "dev/tsunami.hh"
41 #include "sim/builder.hh"
42 #include "sim/system.hh"
43
44 using namespace std;
45
46 Tsunami::Tsunami(const string &name, ScsiController *s, EtherDev *e,
47 SimConsole *con, IntrControl *ic, int intr_freq)
48 : SimObject(name), intrctrl(ic), cons(con), scsi(s), ethernet(e),
49 interrupt_frequency(intr_freq)
50 {
51 for (int i = 0; i < Tsunami::Max_CPUs; i++)
52 intr_sum_type[i] = 0;
53 }
54
55 void
56 Tsunami::serialize(std::ostream &os)
57 {
58 SERIALIZE_ARRAY(intr_sum_type, Tsunami::Max_CPUs);
59 }
60
61 void
62 Tsunami::unserialize(Checkpoint *cp, const std::string &section)
63 {
64 UNSERIALIZE_ARRAY(intr_sum_type, Tsunami::Max_CPUs);
65 }
66
67 BEGIN_DECLARE_SIM_OBJECT_PARAMS(Tsunami)
68
69 SimObjectParam<ScsiController *> scsi;
70 SimObjectParam<EtherDev *> ethernet;
71 SimObjectParam<SimConsole *> cons;
72 SimObjectParam<IntrControl *> intrctrl;
73 Param<int> interrupt_frequency;
74
75 END_DECLARE_SIM_OBJECT_PARAMS(Tsunami)
76
77 BEGIN_INIT_SIM_OBJECT_PARAMS(Tsunami)
78
79 INIT_PARAM(scsi, "scsi controller"),
80 INIT_PARAM(ethernet, "ethernet controller"),
81 INIT_PARAM(cons, "system console"),
82 INIT_PARAM(intrctrl, "interrupt controller"),
83 INIT_PARAM_DFLT(interrupt_frequency, "frequency of interrupts", 1200)
84
85 END_INIT_SIM_OBJECT_PARAMS(Tsunami)
86
87
88 CREATE_SIM_OBJECT(Tsunami)
89 {
90 return new Tsunami(getInstanceName(), scsi, ethernet,
91 cons, intrctrl, interrupt_frequency);
92 }
93
94 REGISTER_SIM_OBJECT("Tsunami", Tsunami)
95