f4f108d43ad8a0b5e9fecbfd876df71747e9c610
[gem5.git] / dev / tsunami.hh
1 /*
2 * Copyright (c) 2003 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #ifndef __TSUNAMI_HH__
30 #define __TSUNAMI_HH__
31
32 #include "sim/sim_object.hh"
33
34 class IntrControl;
35 class ConsoleListener;
36 class SimConsole;
37 class ScsiController;
38 class TlaserClock;
39 class EtherDev;
40 class TsunamiCChip;
41
42 class Tsunami : public SimObject
43 {
44 public:
45
46 static const int Max_CPUs = 4;
47
48 IntrControl *intctrl;
49 // ConsoleListener *listener;
50 SimConsole *cons;
51
52 ScsiController *scsi;
53 EtherDev *ethernet;
54
55 TlaserClock *clock;
56 TsunamiCChip *cchip;
57
58 int intr_sum_type[Tsunami::Max_CPUs];
59 int ipi_pending[Tsunami::Max_CPUs];
60
61 int interrupt_frequency;
62
63 public:
64 Tsunami(const std::string &name, ScsiController *scsi,
65 EtherDev *ethernet, TlaserClock *clock, TsunamiCChip *tc,
66 SimConsole *, IntrControl *intctrl,
67 int intrFreq);
68
69 virtual void serialize(std::ostream &os);
70 virtual void unserialize(Checkpoint *cp, const std::string &section);
71 };
72
73 #endif // __TSUNAMI_HH__