dev/tsunami_io.hh

   1 /*
   2  * Copyright (c) 2003 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  */
  28
  29 /* @file
  30  * Tsunami Fake I/O Space mapping including RTC/timer interrupts
  31  */
  32
  33 #ifndef __TSUNAMI_DMA_HH__
  34 #define __TSUNAMI_DMA_HH__
  35
  36 #include "mem/functional_mem/functional_memory.hh"
  37 #include "dev/tsunami.hh"
  38
  39 /** How often the RTC interrupts */
  40 static const int RTC_RATE  = 1024;
  41
  42 /*
  43  * Tsunami I/O device is a catch all for all the south bridge stuff we care
  44  * to implement.
  45  */
  46 class TsunamiIO : public FunctionalMemory
  47 {
  48   private:
  49     /** The base address of this device */
  50     Addr addr;
  51
  52     /** The size of mappad from the above address */
  53     static const Addr size = 0xff;
  54
  55     struct tm tm;
  56
  57     /** In Tsunami RTC only has two i/o ports one for data and one for address,
  58      * so you write the address and then read/write the data. This store the
  59      * address you are going to be reading from on a read.
  60      */
  61     uint8_t RTCAddress;
  62
  63   protected:
  64
  65     /**
  66      * The ClockEvent is handles the PIT interrupts
  67      */
  68     class ClockEvent : public Event
  69     {
  70       protected:
  71         /** how often the PIT fires */
  72         Tick interval;
  73         /** The mode of the PIT */
  74         uint8_t mode;
  75         /** The status of the PIT */
  76         uint8_t status;
  77
  78       public:
  79         /**
  80          * Just set the mode to 0
  81          */
  82         ClockEvent();
  83
  84         /**
  85          * processs the timer event
  86          */
  87         virtual void process();
  88
  89         /**
  90          * Returns a description of this event
  91          * @return the description
  92          */
  93         virtual const char *description();
  94
  95         /**
  96          * Schedule a timer interrupt to occur sometime in the future.
  97          */
  98         void Program(int count);
  99
 100         /**
 101          * Write the mode bits of the PIT.
 102          * @param mode the new mode
 103          */
 104         void ChangeMode(uint8_t mode);
 105
 106         /**
 107          * The current PIT status.
 108          * @return the status of the PIT
 109          */
 110         uint8_t Status();
 111
 112     };
 113
 114     /**
 115      * Process RTC timer events and generate interrupts appropriately.
 116      */
 117     class RTCEvent : public Event
 118     {
 119       protected:
 120           /** A pointer back to tsunami to create interrupt the processor. */
 121           Tsunami* tsunami;
 122       public:
 123           /** RTC Event initializes the RTC event by scheduling an event
 124            * RTC_RATE times pre second. */
 125           RTCEvent(Tsunami* t);
 126
 127           /**
 128            * Interrupth the processor and reschedule the event.
 129            * */
 130           virtual void process();
 131
 132           /**
 133            * Return a description of this event.
 134            * @return a description
 135            */
 136           virtual const char *description();
 137     };
 138
 139     /** uip UpdateInProgess says that the rtc is updating, but we just fake it
 140      * by alternating it on every read of the bit since we are going to
 141      * override the loop_per_jiffy time that it is trying to use the UIP to
 142      * calculate.
 143      */
 144     uint8_t uip;
 145
 146     /** Mask of the PIC1 */
 147     uint8_t mask1;
 148
 149     /** Mask of the PIC2 */
 150     uint8_t mask2;
 151
 152     /** Mode of PIC1. Not used for anything */
 153     uint8_t mode1;
 154
 155     /** Mode of PIC2. Not used for anything */
 156     uint8_t mode2;
 157
 158     /** Raw PIC interrupt register before masking */
 159     uint8_t picr; //Raw PIC interrput register
 160
 161     /** Is the pic interrupting right now or not. */
 162     bool picInterrupting;
 163
 164     /** A pointer to the Tsunami device which be belong to */
 165     Tsunami *tsunami;
 166
 167     /**
 168      * This timer is initilized, but after I wrote the code
 169      * it doesn't seem to be used again, and best I can tell
 170      * it too is not connected to any interrupt port
 171      */
 172     ClockEvent timer0;
 173
 174     /**
 175      * This timer is used to control the speaker, which
 176      * we normally could care less about, however it is
 177      * also used to calculated the clockspeed and hense
 178      * bogomips which is kinda important to the scheduler
 179      * so we need to implemnt it although after boot I can't
 180      * imagine we would be playing with the PC speaker much
 181      */
 182     ClockEvent timer2;
 183
 184     /** This is the event used to interrupt the cpu like an RTC.  */
 185     RTCEvent rtc;
 186
 187     /** The interval is set via two writes to the PIT.
 188      * This variable contains a flag as to how many writes have happened, and
 189      * the time so far.
 190      */
 191     uint32_t timerData;
 192
 193
 194   public:
 195     /** Return the freqency of the RTC */
 196     uint32_t  frequency() const { return RTC_RATE; }
 197
 198
 199     /**
 200      * Initialize all the data for devices supported by Tsunami I/O.
 201      * @param name name of this device.
 202      * @param t pointer back to the Tsunami object that we belong to.
 203      * @param init_time Time (as in seconds since 1970) to set RTC to.
 204      * @param a address we are mapped at.
 205      * @param mmu pointer to the memory controller that sends us events.
 206      */
 207     TsunamiIO(const std::string &name, Tsunami *t, time_t init_time,
 208               Addr a, MemoryController *mmu);
 209
 210     /**
 211      * Create the tm struct from seconds since 1970
 212      */
 213     void set_time(time_t t);
 214
 215     /**
 216       * Process a read to one of the devices we are emulating.
 217       * @param req Contains the address to read from.
 218       * @param data A pointer to write the read data to.
 219       * @return The fault condition of the access.
 220       */
 221     virtual Fault read(MemReqPtr &req, uint8_t *data);
 222
 223     /**
 224       * Process a write to one of the devices we emulate.
 225       * @param req Contains the address to write to.
 226       * @param data The data to write.
 227       * @return The fault condition of the access.
 228       */
 229     virtual Fault write(MemReqPtr &req, const uint8_t *data);
 230
 231     /**
 232      * Post an PIC interrupt to the CPU via the CChip
 233      * @param bitvector interrupt to post.
 234      */
 235     void postPIC(uint8_t bitvector);
 236
 237     /**
 238      * Clear a posted interrupt
 239      * @param bitvector interrupt to clear
 240      */
 241     void clearPIC(uint8_t bitvector);
 242
 243     /**
 244      * Serialize this object to the given output stream.
 245      * @param os The stream to serialize to.
 246      */
 247     virtual void serialize(std::ostream &os);
 248
 249
 250     /**
 251      * Reconstruct the state of this object from a checkpoint.
 252      * @param cp The checkpoint use.
 253      * @param section The section name of this object
 254      */
 255     virtual void unserialize(Checkpoint *cp, const std::string &section);
 256 };
 257
 258 #endif // __TSUNAMI_IO_HH__