dev/tsunami_io.hh

   1 /*
   2  * Copyright (c) 2004-2005 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  */
  28
  29 /** @file
  30  * Tsunami I/O Space mapping including RTC/timer interrupts
  31  */
  32
  33 #ifndef __DEV_TSUNAMI_IO_HH__
  34 #define __DEV_TSUNAMI_IO_HH__
  35
  36 #include "dev/io_device.hh"
  37 #include "base/range.hh"
  38 #include "dev/tsunami.hh"
  39 #include "sim/eventq.hh"
  40
  41 class MemoryController;
  42
  43 /**
  44  * Tsunami I/O device is a catch all for all the south bridge stuff we care
  45  * to implement.
  46  */
  47 class TsunamiIO : public PioDevice
  48 {
  49   private:
  50     /** The base address of this device */
  51     Addr addr;
  52
  53     /** The size of mappad from the above address */
  54     static const Addr size = 0xff;
  55
  56     struct tm tm;
  57
  58   protected:
  59     /** Real-Time Clock (MC146818) */
  60     class RTC
  61     {
  62       private:
  63         /** Event for RTC periodic interrupt */
  64         struct RTCEvent : public Event
  65         {
  66             /** A pointer back to tsunami to create interrupt the processor. */
  67             Tsunami* tsunami;
  68             Tick interval;
  69
  70             RTCEvent(Tsunami* t, Tick i);
  71
  72             /** Schedule the RTC periodic interrupt */
  73             void scheduleIntr();
  74
  75             /** Event process to occur at interrupt*/
  76             virtual void process();
  77
  78             /** Event description */
  79             virtual const char *description();
  80         };
  81
  82       private:
  83         std::string _name;
  84         const std::string &name() const { return _name; }
  85
  86         /** RTC periodic interrupt event */
  87         RTCEvent event;
  88
  89         /** Current RTC register address/index */
  90         int addr;
  91
  92         /** Data for real-time clock function */
  93         union {
  94             uint8_t clock_data[10];
  95
  96             struct {
  97                 uint8_t sec;
  98                 uint8_t sec_alrm;
  99                 uint8_t min;
 100                 uint8_t min_alrm;
 101                 uint8_t hour;
 102                 uint8_t hour_alrm;
 103                 uint8_t wday;
 104                 uint8_t mday;
 105                 uint8_t mon;
 106                 uint8_t year;
 107             };
 108         };
 109
 110         /** RTC status register A */
 111         uint8_t stat_regA;
 112
 113         /** RTC status register B */
 114         uint8_t stat_regB;
 115
 116       public:
 117         RTC(const std::string &name, Tsunami* t, Tick i);
 118
 119         /** Set the initial RTC time/date */
 120         void set_time(time_t t);
 121
 122         /** RTC address port: write address of RTC RAM data to access */
 123         void writeAddr(const uint8_t *data);
 124
 125         /** RTC write data */
 126         void writeData(const uint8_t *data);
 127
 128         /** RTC read data */
 129         void readData(uint8_t *data);
 130
 131         /**
 132           * Serialize this object to the given output stream.
 133           * @param os The stream to serialize to.
 134           */
 135         void serialize(const std::string &base, std::ostream &os);
 136
 137         /**
 138          * Reconstruct the state of this object from a checkpoint.
 139          * @param cp The checkpoint use.
 140          * @param section The section name of this object
 141          */
 142         void unserialize(const std::string &base, Checkpoint *cp,
 143                          const std::string &section);
 144     };
 145
 146     /** Programmable Interval Timer (Intel 8254) */
 147     class PITimer
 148     {
 149         /** Counter element for PIT */
 150         class Counter
 151         {
 152             /** Event for counter interrupt */
 153             class CounterEvent : public Event
 154             {
 155               private:
 156                 /** Pointer back to Counter */
 157                 Counter* counter;
 158                 Tick interval;
 159
 160               public:
 161                 CounterEvent(Counter*);
 162
 163                 /** Event process */
 164                 virtual void process();
 165
 166                 /** Event description */
 167                 virtual const char *description();
 168
 169                 friend class Counter;
 170             };
 171
 172           private:
 173             std::string _name;
 174             const std::string &name() const { return _name; }
 175
 176             CounterEvent event;
 177
 178             /** Current count value */
 179             uint16_t count;
 180
 181             /** Latched count */
 182             uint16_t latched_count;
 183
 184             /** Interrupt period */
 185             uint16_t period;
 186
 187             /** Current mode of operation */
 188             uint8_t mode;
 189
 190             /** Output goes high when the counter reaches zero */
 191             bool output_high;
 192
 193             /** State of the count latch */
 194             bool latch_on;
 195
 196             /** Set of values for read_byte and write_byte */
 197             enum {LSB, MSB};
 198
 199             /** Determine which byte of a 16-bit count value to read/write */
 200             uint8_t read_byte, write_byte;
 201
 202           public:
 203             Counter(const std::string &name);
 204
 205             /** Latch the current count (if one is not already latched) */
 206             void latchCount();
 207
 208             /** Set the read/write mode */
 209             void setRW(int rw_val);
 210
 211             /** Set operational mode */
 212             void setMode(int mode_val);
 213
 214             /** Set count encoding */
 215             void setBCD(int bcd_val);
 216
 217             /** Read a count byte */
 218             void read(uint8_t *data);
 219
 220             /** Write a count byte */
 221             void write(const uint8_t *data);
 222
 223             /** Is the output high? */
 224             bool outputHigh();
 225
 226             /**
 227              * Serialize this object to the given output stream.
 228              * @param os The stream to serialize to.
 229              */
 230             void serialize(const std::string &base, std::ostream &os);
 231
 232             /**
 233              * Reconstruct the state of this object from a checkpoint.
 234              * @param cp The checkpoint use.
 235              * @param section The section name of this object
 236              */
 237             void unserialize(const std::string &base, Checkpoint *cp,
 238                              const std::string &section);
 239         };
 240
 241       private:
 242         std::string _name;
 243         const std::string &name() const { return _name; }
 244
 245         /** PIT has three seperate counters */
 246         Counter *counter[3];
 247
 248       public:
 249         /** Public way to access individual counters (avoid array accesses) */
 250         Counter counter0;
 251         Counter counter1;
 252         Counter counter2;
 253
 254         PITimer(const std::string &name);
 255
 256         /** Write control word */
 257         void writeControl(const uint8_t* data);
 258
 259         /**
 260          * Serialize this object to the given output stream.
 261          * @param os The stream to serialize to.
 262          */
 263         void serialize(const std::string &base, std::ostream &os);
 264
 265         /**
 266          * Reconstruct the state of this object from a checkpoint.
 267          * @param cp The checkpoint use.
 268          * @param section The section name of this object
 269          */
 270         void unserialize(const std::string &base, Checkpoint *cp,
 271                          const std::string &section);
 272     };
 273
 274     /** Mask of the PIC1 */
 275     uint8_t mask1;
 276
 277     /** Mask of the PIC2 */
 278     uint8_t mask2;
 279
 280     /** Mode of PIC1. Not used for anything */
 281     uint8_t mode1;
 282
 283     /** Mode of PIC2. Not used for anything */
 284     uint8_t mode2;
 285
 286     /** Raw PIC interrupt register before masking */
 287     uint8_t picr; //Raw PIC interrput register
 288
 289     /** Is the pic interrupting right now or not. */
 290     bool picInterrupting;
 291
 292     Tick clockInterval;
 293
 294     /** A pointer to the Tsunami device which be belong to */
 295     Tsunami *tsunami;
 296
 297     /** Intel 8253 Periodic Interval Timer */
 298     PITimer pitimer;
 299
 300     RTC rtc;
 301
 302     /** The interval is set via two writes to the PIT.
 303      * This variable contains a flag as to how many writes have happened, and
 304      * the time so far.
 305      */
 306     uint16_t timerData;
 307
 308   public:
 309     /**
 310      * Return the freqency of the RTC
 311      * @return interrupt rate of the RTC
 312      */
 313     Tick frequency() const;
 314
 315     /**
 316      * Initialize all the data for devices supported by Tsunami I/O.
 317      * @param name name of this device.
 318      * @param t pointer back to the Tsunami object that we belong to.
 319      * @param init_time Time (as in seconds since 1970) to set RTC to.
 320      * @param a address we are mapped at.
 321      * @param mmu pointer to the memory controller that sends us events.
 322      */
 323     TsunamiIO(const std::string &name, Tsunami *t, time_t init_time,
 324               Addr a, MemoryController *mmu, HierParams *hier, Bus *pio_bus,
 325               Tick pio_latency, Tick ci);
 326
 327     /**
 328       * Process a read to one of the devices we are emulating.
 329       * @param req Contains the address to read from.
 330       * @param data A pointer to write the read data to.
 331       * @return The fault condition of the access.
 332       */
 333     virtual Fault * read(MemReqPtr &req, uint8_t *data);
 334
 335     /**
 336       * Process a write to one of the devices we emulate.
 337       * @param req Contains the address to write to.
 338       * @param data The data to write.
 339       * @return The fault condition of the access.
 340       */
 341     virtual Fault * write(MemReqPtr &req, const uint8_t *data);
 342
 343     /**
 344      * Post an PIC interrupt to the CPU via the CChip
 345      * @param bitvector interrupt to post.
 346      */
 347     void postPIC(uint8_t bitvector);
 348
 349     /**
 350      * Clear a posted interrupt
 351      * @param bitvector interrupt to clear
 352      */
 353     void clearPIC(uint8_t bitvector);
 354
 355     /**
 356      * Serialize this object to the given output stream.
 357      * @param os The stream to serialize to.
 358      */
 359     virtual void serialize(std::ostream &os);
 360
 361     /**
 362      * Reconstruct the state of this object from a checkpoint.
 363      * @param cp The checkpoint use.
 364      * @param section The section name of this object
 365      */
 366     virtual void unserialize(Checkpoint *cp, const std::string &section);
 367
 368     Tick cacheAccess(MemReqPtr &req);
 369 };
 370
 371 #endif // __DEV_TSUNAMI_IO_HH__