dev/tsunami_io.hh

   1 /*
   2  * Copyright (c) 2004 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  */
  28
  29 /* @file
  30  * Tsunami Fake I/O Space mapping including RTC/timer interrupts
  31  */
  32
  33 #ifndef __DEV_TSUNAMI_IO_HH__
  34 #define __DEV_TSUNAMI_IO_HH__
  35
  36 #include "dev/io_device.hh"
  37 #include "base/range.hh"
  38 #include "dev/tsunami.hh"
  39 #include "sim/eventq.hh"
  40
  41 /** How often the RTC interrupts */
  42 static const int RTC_RATE  = 1024;
  43
  44 /*
  45  * Tsunami I/O device is a catch all for all the south bridge stuff we care
  46  * to implement.
  47  */
  48 class TsunamiIO : public PioDevice
  49 {
  50   private:
  51     /** The base address of this device */
  52     Addr addr;
  53
  54     /** The size of mappad from the above address */
  55     static const Addr size = 0xff;
  56
  57     struct tm tm;
  58
  59     /**
  60      * In Tsunami RTC only has two i/o ports one for data and one for
  61      * address, so you write the address and then read/write the
  62      * data. This store the address you are going to be reading from
  63      * on a read.
  64      */
  65     uint8_t RTCAddress;
  66
  67   protected:
  68
  69     /**
  70      * The ClockEvent is handles the PIT interrupts
  71      */
  72     class ClockEvent : public Event
  73     {
  74       protected:
  75         /** how often the PIT fires */
  76         Tick interval;
  77         /** The mode of the PIT */
  78         uint8_t mode;
  79         /** The status of the PIT */
  80         uint8_t status;
  81
  82       public:
  83         /**
  84          * Just set the mode to 0
  85          */
  86         ClockEvent();
  87
  88         /**
  89          * processs the timer event
  90          */
  91         virtual void process();
  92
  93         /**
  94          * Returns a description of this event
  95          * @return the description
  96          */
  97         virtual const char *description();
  98
  99         /**
 100          * Schedule a timer interrupt to occur sometime in the future.
 101          */
 102         void Program(int count);
 103
 104         /**
 105          * Write the mode bits of the PIT.
 106          * @param mode the new mode
 107          */
 108         void ChangeMode(uint8_t mode);
 109
 110         /**
 111          * The current PIT status.
 112          * @return the status of the PIT
 113          */
 114         uint8_t Status();
 115
 116         /**
 117          * Serialize this object to the given output stream.
 118          * @param os The stream to serialize to.
 119          */
 120         virtual void serialize(std::ostream &os);
 121
 122
 123         /**
 124          * Reconstruct the state of this object from a checkpoint.
 125          * @param cp The checkpoint use.
 126          * @param section The section name of this object
 127          */
 128         virtual void unserialize(Checkpoint *cp, const std::string &section);
 129      };
 130
 131     /**
 132      * Process RTC timer events and generate interrupts appropriately.
 133      */
 134     class RTCEvent : public Event
 135     {
 136       protected:
 137         /** A pointer back to tsunami to create interrupt the processor. */
 138         Tsunami* tsunami;
 139       public:
 140         /** RTC Event initializes the RTC event by scheduling an event
 141          * RTC_RATE times pre second. */
 142         RTCEvent(Tsunami* t);
 143
 144         /**
 145          * Interrupth the processor and reschedule the event.
 146          */
 147         virtual void process();
 148
 149         /**
 150          * Return a description of this event.
 151          * @return a description
 152          */
 153         virtual const char *description();
 154
 155         /**
 156          * Serialize this object to the given output stream.
 157          * @param os The stream to serialize to.
 158          */
 159         virtual void serialize(std::ostream &os);
 160
 161         /**
 162          * Reconstruct the state of this object from a checkpoint.
 163          * @param cp The checkpoint use.
 164          * @param section The section name of this object
 165          */
 166         virtual void unserialize(Checkpoint *cp, const std::string &section);
 167     };
 168
 169     /** uip UpdateInProgess says that the rtc is updating, but we just fake it
 170      * by alternating it on every read of the bit since we are going to
 171      * override the loop_per_jiffy time that it is trying to use the UIP to
 172      * calculate.
 173      */
 174     uint8_t uip;
 175
 176     /** Mask of the PIC1 */
 177     uint8_t mask1;
 178
 179     /** Mask of the PIC2 */
 180     uint8_t mask2;
 181
 182     /** Mode of PIC1. Not used for anything */
 183     uint8_t mode1;
 184
 185     /** Mode of PIC2. Not used for anything */
 186     uint8_t mode2;
 187
 188     /** Raw PIC interrupt register before masking */
 189     uint8_t picr; //Raw PIC interrput register
 190
 191     /** Is the pic interrupting right now or not. */
 192     bool picInterrupting;
 193
 194     /** A pointer to the Tsunami device which be belong to */
 195     Tsunami *tsunami;
 196
 197     /**
 198      * This timer is initilized, but after I wrote the code
 199      * it doesn't seem to be used again, and best I can tell
 200      * it too is not connected to any interrupt port
 201      */
 202     ClockEvent timer0;
 203
 204     /**
 205      * This timer is used to control the speaker, which
 206      * we normally could care less about, however it is
 207      * also used to calculated the clockspeed and hense
 208      * bogomips which is kinda important to the scheduler
 209      * so we need to implemnt it although after boot I can't
 210      * imagine we would be playing with the PC speaker much
 211      */
 212     ClockEvent timer2;
 213
 214     /** This is the event used to interrupt the cpu like an RTC.  */
 215     RTCEvent rtc;
 216
 217     /** The interval is set via two writes to the PIT.
 218      * This variable contains a flag as to how many writes have happened, and
 219      * the time so far.
 220      */
 221     uint32_t timerData;
 222
 223   public:
 224     /**
 225      * Return the freqency of the RTC
 226      * @return interrupt rate of the RTC
 227      */
 228     Tick  frequency() const { return RTC_RATE; }
 229
 230     /**
 231      * Initialize all the data for devices supported by Tsunami I/O.
 232      * @param name name of this device.
 233      * @param t pointer back to the Tsunami object that we belong to.
 234      * @param init_time Time (as in seconds since 1970) to set RTC to.
 235      * @param a address we are mapped at.
 236      * @param mmu pointer to the memory controller that sends us events.
 237      */
 238     TsunamiIO(const std::string &name, Tsunami *t, time_t init_time,
 239               Addr a, MemoryController *mmu, HierParams *hier, Bus *bus,
 240               Tick pio_latency);
 241
 242     /**
 243      * Create the tm struct from seconds since 1970
 244      */
 245     void set_time(time_t t);
 246
 247     /**
 248       * Process a read to one of the devices we are emulating.
 249       * @param req Contains the address to read from.
 250       * @param data A pointer to write the read data to.
 251       * @return The fault condition of the access.
 252       */
 253     virtual Fault read(MemReqPtr &req, uint8_t *data);
 254
 255     /**
 256       * Process a write to one of the devices we emulate.
 257       * @param req Contains the address to write to.
 258       * @param data The data to write.
 259       * @return The fault condition of the access.
 260       */
 261     virtual Fault write(MemReqPtr &req, const uint8_t *data);
 262
 263     /**
 264      * Post an PIC interrupt to the CPU via the CChip
 265      * @param bitvector interrupt to post.
 266      */
 267     void postPIC(uint8_t bitvector);
 268
 269     /**
 270      * Clear a posted interrupt
 271      * @param bitvector interrupt to clear
 272      */
 273     void clearPIC(uint8_t bitvector);
 274
 275     /**
 276      * Serialize this object to the given output stream.
 277      * @param os The stream to serialize to.
 278      */
 279     virtual void serialize(std::ostream &os);
 280
 281     /**
 282      * Reconstruct the state of this object from a checkpoint.
 283      * @param cp The checkpoint use.
 284      * @param section The section name of this object
 285      */
 286     virtual void unserialize(Checkpoint *cp, const std::string &section);
 287
 288     Tick cacheAccess(MemReqPtr &req);
 289 };
 290
 291 #endif // __DEV_TSUNAMI_IO_HH__