2 * Copyright (c) 2004 The Regents of The University of Michigan
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6 * modification, are permitted provided that the following conditions are
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14 * this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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30 * Implements a 8250 UART
36 #include "base/inifile.hh"
37 #include "base/str.hh" // for to_number
38 #include "base/trace.hh"
39 #include "dev/simconsole.hh"
40 #include "dev/uart.hh"
41 #include "dev/platform.hh"
42 #include "mem/bus/bus.hh"
43 #include "mem/bus/pio_interface.hh"
44 #include "mem/bus/pio_interface_impl.hh"
45 #include "mem/functional/memory_control.hh"
46 #include "sim/builder.hh"
50 Uart::Uart(const string
&name
, SimConsole
*c
, MemoryController
*mmu
, Addr a
,
51 Addr s
, HierParams
*hier
, Bus
*bus
, Tick pio_latency
, Platform
*p
)
52 : PioDevice(name
, p
), addr(a
), size(s
), cons(c
)
54 mmu
->add_child(this, RangeSize(addr
, size
));
58 pioInterface
= newPioInterface(name
, hier
, bus
, this,
60 pioInterface
->addAddrRange(RangeSize(addr
, size
));
61 pioLatency
= pio_latency
* bus
->clockRate
;
68 platform
->uart
= this;
72 Uart::cacheAccess(MemReqPtr
&req
)
74 return curTick
+ pioLatency
;
77 DEFINE_SIM_OBJECT_CLASS_NAME("Uart", Uart
)