Merge zizzer:/bk/m5 into zeep.eecs.umich.edu:/z/saidi/work/m5-clean
[gem5.git] / dev / uart.cc
1 /*
2 * Copyright (c) 2004 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 /** @file
30 * Implements a 8250 UART
31 */
32
33 #include <string>
34 #include <vector>
35
36 #include "base/inifile.hh"
37 #include "base/str.hh" // for to_number
38 #include "base/trace.hh"
39 #include "dev/simconsole.hh"
40 #include "dev/uart.hh"
41 #include "dev/platform.hh"
42 #include "mem/bus/bus.hh"
43 #include "mem/bus/pio_interface.hh"
44 #include "mem/bus/pio_interface_impl.hh"
45 #include "mem/functional/memory_control.hh"
46 #include "sim/builder.hh"
47
48 using namespace std;
49
50 Uart::Uart(const string &name, SimConsole *c, MemoryController *mmu, Addr a,
51 Addr s, HierParams *hier, Bus *bus, Tick pio_latency, Platform *p)
52 : PioDevice(name, p), addr(a), size(s), cons(c)
53 {
54 mmu->add_child(this, RangeSize(addr, size));
55
56
57 if (bus) {
58 pioInterface = newPioInterface(name, hier, bus, this,
59 &Uart::cacheAccess);
60 pioInterface->addAddrRange(RangeSize(addr, size));
61 pioLatency = pio_latency * bus->clockRate;
62 }
63
64 status = 0;
65
66 // set back pointers
67 cons->uart = this;
68 platform->uart = this;
69 }
70
71 Tick
72 Uart::cacheAccess(MemReqPtr &req)
73 {
74 return curTick + pioLatency;
75 }
76
77 DEFINE_SIM_OBJECT_CLASS_NAME("Uart", Uart)
78