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11 <h1>The Mesa
3D Graphics Library
</h1>
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17 <h1>Mesa
10.5.5 Release Notes / May
11,
2015</h1>
20 Mesa
10.5.5 is a bug fix release which fixes bugs found since the
10.5.4 release.
23 Mesa
10.5.5 implements the OpenGL
3.3 API, but the version reported by
24 glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
25 glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
26 Some drivers don't support all the features required in OpenGL
3.3. OpenGL
27 3.3 is
<strong>only
</strong> available if requested at context creation
28 because compatibility contexts are not supported.
32 <h2>SHA256 checksums
</h2>
34 c10f00fd792b8290dd51ebcc48a9016c4cafab19ec205423c6fcadfd7f3a59f2 mesa-
10.5.5.tar.gz
35 4ac4e4ea3414f1cadb1467f2f173f9e56170d31e8674f7953a46f0549d319f28 mesa-
10.5.5.tar.xz
44 <p>This list is likely incomplete.
</p>
48 <li><a href=
"https://bugs.freedesktop.org/show_bug.cgi?id=88521">Bug
88521</a> - GLBenchmark
2.7 TRex renders with artifacts on Gen8 with !UXA
</li>
50 <li><a href=
"https://bugs.freedesktop.org/show_bug.cgi?id=89455">Bug
89455</a> - [NVC0/Gallium] Unigine Heaven black and white boxes
</li>
52 <li><a href=
"https://bugs.freedesktop.org/show_bug.cgi?id=89689">Bug
89689</a> - [Regression] Weston on DRM backend won't start with new version of mesa
</li>
54 <li><a href=
"https://bugs.freedesktop.org/show_bug.cgi?id=90130">Bug
90130</a> - gl_PrimitiveId seems to reset at
340</li>
61 <p>Boyan Ding (
1):
</p>
63 <li>i965: Add XRGB8888 format to intel_screen_make_configs
</li>
66 <p>Emil Velikov (
3):
</p>
68 <li>docs: Add sha256 sums for the
10.5.4 release
</li>
69 <li>r300: do not link against libdrm_intel
</li>
70 <li>Update version to
10.5.5</li>
73 <p>Ilia Mirkin (
4):
</p>
75 <li>nvc0/ir: flush denorms to zero in non-compute shaders
</li>
76 <li>gk110/ir: fix set with a register dest to not auto-set the abs flag
</li>
77 <li>nvc0/ir: fix predicated PFETCH emission
</li>
78 <li>nv50/ir: fix asFlow() const helper for OP_JOIN
</li>
81 <p>Kenneth Graunke (
2):
</p>
83 <li>i965: Make intel_emit_linear_blit handle Gen8+ alignment restrictions.
</li>
84 <li>i965: Disallow linear blits that are not cacheline aligned.
</li>
87 <p>Roland Scheidegger (
1):
</p>
89 <li>draw: fix prim ids when there's no gs
</li>