radv: Update CTS version.
[mesa.git] / docs / relnotes / 10.5.5.rst
1 Mesa 10.5.5 Release Notes / May 11, 2015
2 ========================================
3
4 Mesa 10.5.5 is a bug fix release which fixes bugs found since the 10.5.4
5 release.
6
7 Mesa 10.5.5 implements the OpenGL 3.3 API, but the version reported by
8 glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
9 glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being
10 used. Some drivers don't support all the features required in OpenGL
11 3.3. OpenGL 3.3 is **only** available if requested at context creation
12 because compatibility contexts are not supported.
13
14 SHA256 checksums
15 ----------------
16
17 ::
18
19 c10f00fd792b8290dd51ebcc48a9016c4cafab19ec205423c6fcadfd7f3a59f2 mesa-10.5.5.tar.gz
20 4ac4e4ea3414f1cadb1467f2f173f9e56170d31e8674f7953a46f0549d319f28 mesa-10.5.5.tar.xz
21
22 New features
23 ------------
24
25 None
26
27 Bug fixes
28 ---------
29
30 This list is likely incomplete.
31
32 - `Bug 88521 <https://bugs.freedesktop.org/show_bug.cgi?id=88521>`__ -
33 GLBenchmark 2.7 TRex renders with artifacts on Gen8 with !UXA
34 - `Bug 89455 <https://bugs.freedesktop.org/show_bug.cgi?id=89455>`__ -
35 [NVC0/Gallium] Unigine Heaven black and white boxes
36 - `Bug 89689 <https://bugs.freedesktop.org/show_bug.cgi?id=89689>`__ -
37 [Regression] Weston on DRM backend won't start with new version of
38 mesa
39 - `Bug 90130 <https://bugs.freedesktop.org/show_bug.cgi?id=90130>`__ -
40 gl_PrimitiveId seems to reset at 340
41
42 Changes
43 -------
44
45 Boyan Ding (1):
46
47 - i965: Add XRGB8888 format to intel_screen_make_configs
48
49 Emil Velikov (3):
50
51 - docs: Add sha256 sums for the 10.5.4 release
52 - r300: do not link against libdrm_intel
53 - Update version to 10.5.5
54
55 Ilia Mirkin (4):
56
57 - nvc0/ir: flush denorms to zero in non-compute shaders
58 - gk110/ir: fix set with a register dest to not auto-set the abs flag
59 - nvc0/ir: fix predicated PFETCH emission
60 - nv50/ir: fix asFlow() const helper for OP_JOIN
61
62 Kenneth Graunke (2):
63
64 - i965: Make intel_emit_linear_blit handle Gen8+ alignment
65 restrictions.
66 - i965: Disallow linear blits that are not cacheline aligned.
67
68 Roland Scheidegger (1):
69
70 - draw: fix prim ids when there's no gs