docs/relnotes/17.2.6.html

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  11   <h1>The Mesa 3D Graphics Library</h1>
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  16
  17 <h1>Mesa 17.2.6 Release Notes / November 25, 2017</h1>
  18
  19 <p>
  20 Mesa 17.2.6 is a bug fix release which fixes bugs found since the 17.2.5 release.
  21 </p>
  22 <p>
  23 Mesa 17.2.6 implements the OpenGL 4.5 API, but the version reported by
  24 glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
  25 glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
  26 Some drivers don't support all the features required in OpenGL 4.5.  OpenGL
  27 4.5 is <strong>only</strong> available if requested at context creation
  28 because compatibility contexts are not supported.
  29 </p>
  30
  31
  32 <h2>SHA256 checksums</h2>
  33 <pre>
  34 a9ed76702ffb14ad674ad48899f5c8c7e3a0f987911878a5dfdc4117dce5b415  mesa-17.2.6.tar.gz
  35 6ad85224620330be26ab68c8fc78381b12b38b610ade2db8716b38faaa8f30de  mesa-17.2.6.tar.xz
  36 </pre>
  37
  38
  39 <h2>New features</h2>
  40 <p>None</p>
  41
  42
  43 <h2>Bug fixes</h2>
  44 <ul>
  45
  46 <li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100438">Bug 100438</a> - glsl/ir.cpp:1376: ir_dereference_variable::ir_dereference_variable(ir_variable*): Assertion `var != NULL' failed.</li>
  47
  48 <li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=102177">Bug 102177</a> - [SKL] ES31-CTS.core.sepshaderobjs.StateInteraction fails sporadically</li>
  49
  50 <li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=103115">Bug 103115</a> - [BSW BXT GLK] dEQP-VK.spirv_assembly.instruction.compute.sconvert.int32_to_int64</li>
  51
  52 <li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=103519">Bug 103519</a> - wayland egl apps crash on start with mesa 17.2</li>
  53
  54 <li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=103529">Bug 103529</a> - [GM45] GPU hang with mpv fullscreen (bisected)</li>
  55
  56 <li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=103626">Bug 103626</a> - [SNB] ES3-CTS.functional.shaders.precision</li>
  57
  58 <li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=103628">Bug 103628</a> - [BXT, GLK, BSW] KHR-GL46.shader_ballot_tests.ShaderBallotBitmasks</li>
  59
  60 <li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=103787">Bug 103787</a> - [BDW,BSW] gpu hang on spec.arb_pipeline_statistics_query.arb_pipeline_statistics_query-comp</li>
  61
  62 </ul>
  63
  64
  65 <h2>Changes</h2>
  66 <p>Adam Jackson (2):</p>
  67 <ul>
  68   <li>glx/drisw: Fix glXMakeCurrent(dpy, None, ctx)</li>
  69   <li>glx/dri3: Fix passing renderType into glXCreateContext</li>
  70 </ul>
  71
  72 <p>Alex Smith (2):</p>
  73 <ul>
  74   <li>spirv: Use correct type for sampled images</li>
  75   <li>nir/spirv: tg4 requires a sampler</li>
  76 </ul>
  77
  78 <p>Andres Gomez (14):</p>
  79 <ul>
  80   <li>docs: add sha256 checksums for 17.2.5</li>
  81   <li>cherry-ignore: intel/fs: Use a pure vertical stride for large register strides</li>
  82   <li>cherry-ignore: intel/nir: Use the correct indirect lowering masks in link_shaders</li>
  83   <li>cherry-ignore: intel/fs: Use the original destination region for int MUL lowering</li>
  84   <li>cherry-ignore: intel/fs: refactors</li>
  85   <li>cherry-ignore: r600/shader: reserve first register of vertex shader.</li>
  86   <li>cherry-ignore: anv/cmd_buffer: Advance the address when initializing clear colors</li>
  87   <li>cherry-ignore: anv/cmd_buffer: Take bo_offset into account in fast clear state addresses</li>
  88   <li>cherry-ignore: i965: Mark BOs as external when we export their handle</li>
  89   <li>cherry-ignore: added 17.3 nominations.</li>
  90   <li>cherry-ignore: glsl: Fix typo fragement -&gt; fragment</li>
  91   <li>cherry-ignore: egl: pass the dri2_dpy to the $plat_teardown functions</li>
  92   <li>cherry-ignore: Revert "intel/fs: Use a pure vertical stride for large register strides"</li>
  93   <li>Update version to 17.2.6</li>
  94 </ul>
  95
  96 <p>Anuj Phogat (2):</p>
  97 <ul>
  98   <li>i965: Program DWord Length in MI_FLUSH_DW</li>
  99   <li>i965/gen8+: Fix the number of dwords programmed in MI_FLUSH_DW</li>
 100 </ul>
 101
 102 <p>Bas Nieuwenhuizen (2):</p>
 103 <ul>
 104   <li>radv: Free syncobj with multiple imports.</li>
 105   <li>radv: Free temporary syncobj after waiting on it.</li>
 106 </ul>
 107
 108 <p>Dave Airlie (1):</p>
 109 <ul>
 110   <li>r600: fix isoline tess factor component swapping.</li>
 111 </ul>
 112
 113 <p>Derek Foreman (1):</p>
 114 <ul>
 115   <li>egl/wayland: Add a fallback when fourcc query isn't supported</li>
 116 </ul>
 117
 118 <p>Dylan Baker (1):</p>
 119 <ul>
 120   <li>autotools: Set C++ visibility flags on Intel</li>
 121 </ul>
 122
 123 <p>Emil Velikov (3):</p>
 124 <ul>
 125   <li>targets/opencl: don't hardcode the icd file install to /etc/...</li>
 126   <li>configure.ac: loosen --enable-glvnd check to honour egl</li>
 127   <li>configure.ac: require xcb* for the omx/va/... when using x11 platform</li>
 128 </ul>
 129
 130 <p>George Barrett (1):</p>
 131 <ul>
 132   <li>glsl: Catch subscripted calls to undeclared subroutines</li>
 133 </ul>
 134
 135 <p>Jason Ekstrand (9):</p>
 136 <ul>
 137   <li>intel/fs: Use ANY/ALL32 predicates in SIMD32</li>
 138   <li>intel/fs: Use an explicit D type for vote any/all/eq intrinsics</li>
 139   <li>intel/fs: Use a pair of 1-wide MOVs instead of SEL for any/all</li>
 140   <li>intel/eu/reg: Add a subscript() helper</li>
 141   <li>intel/fs: Fix MOV_INDIRECT for 64-bit values on little-core</li>
 142   <li>intel/fs: Fix integer multiplication lowering for src/dst hazards</li>
 143   <li>intel/fs: Mark 64-bit values as being contiguous</li>
 144   <li>intel/fs: Rework zero-length URB write handling</li>
 145   <li>i965: Add stencil buffers to cache set regardless of stencil texturing</li>
 146 </ul>
 147
 148 <p>Kenneth Graunke (5):</p>
 149 <ul>
 150   <li>i965: properly initialize brw-&gt;cs.base.stage to MESA_SHADER_COMPUTE</li>
 151   <li>i965: Make L3 configuration atom listen for TCS/TES program updates.</li>
 152   <li>intel/tools: Fix detection of enabled shader stages.</li>
 153   <li>i965: Implement another VF cache invalidate workaround on Gen8+.</li>
 154   <li>i965: Upload invariant state once at the start of the batch on Gen4-5.</li>
 155 </ul>
 156
 157 <p>Matt Turner (2):</p>
 158 <ul>
 159   <li>i965/fs: Fix extract_i8/u8 to a 64-bit destination</li>
 160   <li>i965/fs: Split all 32-&gt;64-bit MOVs on CHV, BXT, GLK</li>
 161 </ul>
 162
 163 <p>Neil Roberts (1):</p>
 164 <ul>
 165   <li>glsl: Transform fb buffers are only active if a variable uses them</li>
 166 </ul>
 167
 168 <p>Nicolai Hähnle (1):</p>
 169 <ul>
 170   <li>ddebug: fix use-after-free of streamout targets</li>
 171 </ul>
 172
 173 <p>Tim Rowley (2):</p>
 174 <ul>
 175   <li>swr/rast: Use gather instruction for i32gather_ps on simd16/avx512</li>
 176   <li>swr/rast: Faster emulated simd16 permute</li>
 177 </ul>
 178
 179 <p>Timothy Arceri (3):</p>
 180 <ul>
 181   <li>glsl: drop cache_fallback</li>
 182   <li>glsl: use the correct parent when allocating program data members</li>
 183   <li>mesa: rework how we free gl_shader_program_data</li>
 184 </ul>
 185
 186
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