Cleanups and improvements in examples/cmos/
[yosys.git] / examples / cmos / cmos_cells.v
1
2 module BUF(A, Y);
3 input A;
4 output Y;
5 assign Y = A;
6 endmodule
7
8 module NOT(A, Y);
9 input A;
10 output Y;
11 assign Y = ~A;
12 endmodule
13
14 module NAND(A, B, Y);
15 input A, B;
16 output Y;
17 assign Y = ~(A & B);
18 endmodule
19
20 module NOR(A, B, Y);
21 input A, B;
22 output Y;
23 assign Y = ~(A | B);
24 endmodule
25
26 module DFF(C, D, Q);
27 input C, D;
28 output reg Q;
29 always @(posedge C)
30 Q <= D;
31 endmodule
32
33 module DFFSR(C, D, Q, S, R);
34 input C, D, S, R;
35 output reg Q;
36 always @(posedge C, posedge S, posedge R)
37 if (S)
38 Q <= 1'b1;
39 else if (R)
40 Q <= 1'b0;
41 else
42 Q <= D;
43 endmodule
44