xilinx/ecp5/ice40: add (* abc9_flop *) to bypass-able cells
[yosys.git] / examples / cxx-api / demomain.cc
1 // Note: Set ENABLE_LIBYOSYS=1 in Makefile or Makefile.conf to build libyosys.so
2 // yosys-config --exec --cxx -o demomain --cxxflags --ldflags demomain.cc -lyosys -lstdc++
3
4 #include <kernel/yosys.h>
5
6 int main()
7 {
8 Yosys::log_streams.push_back(&std::cout);
9 Yosys::log_error_stderr = true;
10
11 Yosys::yosys_setup();
12 Yosys::yosys_banner();
13
14 Yosys::run_pass("read_verilog example.v");
15 Yosys::run_pass("synth -noabc");
16 Yosys::run_pass("clean -purge");
17 Yosys::run_pass("write_blif example.blif");
18
19 Yosys::yosys_shutdown();
20 return 0;
21 }
22